54 	 .p2 = {.dot_limit = 200000, .p2_slow = 14, .p2_fast = 14},
69 	 .p2 = {.dot_limit = 200000, .p2_slow = 14, .p2_fast = 14},
81 	 .p2 = {.dot_limit = 225000, .p2_slow = 10, .p2_fast = 5},
93 	 .p2 = {.dot_limit = 225000, .p2_slow = 10, .p2_fast = 5},
105 	 .p2 = {.dot_limit = 225000, .p2_slow = 10, .p2_fast = 10},
117 	 .p2 = {.dot_limit = 225000, .p2_slow = 10, .p2_fast = 10},
322 	switch (clock->p2) {  in cdv_dpll_set_clock_cdv()
336 		DRM_ERROR("Bad P2 clock: %d\n", clock->p2);  in cdv_dpll_set_clock_cdv()
405 	clock->p = clock->p1 * clock->p2;  in cdv_intel_clock()
422 			clock.p2 = 10;  in cdv_intel_find_dp_pll()
428 			clock.p2 = 10;  in cdv_intel_find_dp_pll()
438 			clock.p2 = 10;  in cdv_intel_find_dp_pll()
444 			clock.p2 = 10;  in cdv_intel_find_dp_pll()
758 		if (clock.p2 == 7)  in cdv_intel_crtc_mode_set()
843 	clock->p = clock->p1 * clock->p2;  in i8xx_clock()
894 		clock.p2 = 14;  in cdv_intel_crtc_clock_get()
912 			clock.p2 = 4;  in cdv_intel_crtc_clock_get()
914 			clock.p2 = 2;  in cdv_intel_crtc_clock_get()