400 			    struct exynos_drm_plane *plane)  in vp_video_buffer()  argument
403 	struct drm_plane_state *state = plane->base.state;  in vp_video_buffer()
425 	luma_addr[0] = plane->dma_addr[0];  in vp_video_buffer()
426 	chroma_addr[0] = plane->dma_addr[1];  in vp_video_buffer()
462 	vp_reg_write(res, VP_SRC_WIDTH, plane->src_w);  in vp_video_buffer()
463 	vp_reg_write(res, VP_SRC_HEIGHT, plane->src_h);  in vp_video_buffer()
465 			VP_SRC_H_POSITION_VAL(plane->src_x));  in vp_video_buffer()
466 	vp_reg_write(res, VP_SRC_V_POSITION, plane->src_y);  in vp_video_buffer()
468 	vp_reg_write(res, VP_DST_WIDTH, plane->crtc_w);  in vp_video_buffer()
469 	vp_reg_write(res, VP_DST_H_POSITION, plane->crtc_x);  in vp_video_buffer()
471 		vp_reg_write(res, VP_DST_HEIGHT, plane->crtc_h / 2);  in vp_video_buffer()
472 		vp_reg_write(res, VP_DST_V_POSITION, plane->crtc_y / 2);  in vp_video_buffer()
474 		vp_reg_write(res, VP_DST_HEIGHT, plane->crtc_h);  in vp_video_buffer()
475 		vp_reg_write(res, VP_DST_V_POSITION, plane->crtc_y);  in vp_video_buffer()
478 	vp_reg_write(res, VP_H_RATIO, plane->h_ratio);  in vp_video_buffer()
479 	vp_reg_write(res, VP_V_RATIO, plane->v_ratio);  in vp_video_buffer()
491 	mixer_cfg_layer(ctx, plane->zpos, true);  in vp_video_buffer()
508 static int mixer_setup_scale(const struct exynos_drm_plane *plane,  in mixer_setup_scale()  argument
511 	if (plane->crtc_w != plane->src_w) {  in mixer_setup_scale()
512 		if (plane->crtc_w == 2 * plane->src_w)  in mixer_setup_scale()
518 	if (plane->crtc_h != plane->src_h) {  in mixer_setup_scale()
519 		if (plane->crtc_h == 2 * plane->src_h)  in mixer_setup_scale()
533 			       struct exynos_drm_plane *plane)  in mixer_graph_buffer()  argument
536 	struct drm_plane_state *state = plane->base.state;  in mixer_graph_buffer()
540 	unsigned int win = plane->zpos;  in mixer_graph_buffer()
571 	if (mixer_setup_scale(plane, &x_ratio, &y_ratio))  in mixer_graph_buffer()
574 	dst_x_offset = plane->crtc_x;  in mixer_graph_buffer()
575 	dst_y_offset = plane->crtc_y;  in mixer_graph_buffer()
578 	dma_addr = plane->dma_addr[0]  in mixer_graph_buffer()
579 		+ (plane->src_x * fb->bits_per_pixel >> 3)  in mixer_graph_buffer()
580 		+ (plane->src_y * fb->pitches[0]);  in mixer_graph_buffer()
608 	val  = MXR_GRP_WH_WIDTH(plane->src_w);  in mixer_graph_buffer()
609 	val |= MXR_GRP_WH_HEIGHT(plane->src_h);  in mixer_graph_buffer()
760 			struct exynos_drm_plane *plane = &ctx->planes[win];  in mixer_irq_handler()  local
762 			if (!plane->pending_fb)  in mixer_irq_handler()
765 			exynos_drm_crtc_finish_update(ctx->crtc, plane);  in mixer_irq_handler()
955 			       struct exynos_drm_plane *plane)  in mixer_update_plane()  argument
959 	DRM_DEBUG_KMS("win: %d\n", plane->zpos);  in mixer_update_plane()
964 	if (plane->zpos > 1 && mixer_ctx->vp_enabled)  in mixer_update_plane()
965 		vp_video_buffer(mixer_ctx, plane);  in mixer_update_plane()
967 		mixer_graph_buffer(mixer_ctx, plane);  in mixer_update_plane()
971 				struct exynos_drm_plane *plane)  in mixer_disable_plane()  argument
977 	DRM_DEBUG_KMS("win: %d\n", plane->zpos);  in mixer_disable_plane()
985 	mixer_cfg_layer(mixer_ctx, plane->zpos, false);  in mixer_disable_plane()