669 static int gsc_src_set_buf_seq(struct gsc_context *ctx, u32 buf_id,  in gsc_src_set_buf_seq()  argument
675 	u32 mask = 0x00000001 << buf_id;  in gsc_src_set_buf_seq()
677 	DRM_DEBUG_KMS("buf_id[%d]buf_type[%d]\n", buf_id, buf_type);  in gsc_src_set_buf_seq()
696 	cfg |= masked << buf_id;  in gsc_src_set_buf_seq()
705 		struct drm_exynos_ipp_buf_info *buf_info, u32 buf_id,  in gsc_src_set_addr()  argument
721 		property->prop_id, buf_id, buf_type);  in gsc_src_set_addr()
723 	if (buf_id > GSC_MAX_SRC) {  in gsc_src_set_addr()
724 		dev_info(ippdrv->dev, "invalid buf_id %d.\n", buf_id);  in gsc_src_set_addr()
732 			GSC_IN_BASE_ADDR_Y(buf_id));  in gsc_src_set_addr()
734 			GSC_IN_BASE_ADDR_CB(buf_id));  in gsc_src_set_addr()
736 			GSC_IN_BASE_ADDR_CR(buf_id));  in gsc_src_set_addr()
739 		gsc_write(0x0, GSC_IN_BASE_ADDR_Y(buf_id));  in gsc_src_set_addr()
740 		gsc_write(0x0, GSC_IN_BASE_ADDR_CB(buf_id));  in gsc_src_set_addr()
741 		gsc_write(0x0, GSC_IN_BASE_ADDR_CR(buf_id));  in gsc_src_set_addr()
748 	return gsc_src_set_buf_seq(ctx, buf_id, buf_type);  in gsc_src_set_addr()
1108 static int gsc_dst_set_buf_seq(struct gsc_context *ctx, u32 buf_id,  in gsc_dst_set_buf_seq()  argument
1114 	u32 mask = 0x00000001 << buf_id;  in gsc_dst_set_buf_seq()
1117 	DRM_DEBUG_KMS("buf_id[%d]buf_type[%d]\n", buf_id, buf_type);  in gsc_dst_set_buf_seq()
1139 	cfg |= masked << buf_id;  in gsc_dst_set_buf_seq()
1160 		struct drm_exynos_ipp_buf_info *buf_info, u32 buf_id,  in gsc_dst_set_addr()  argument
1176 		property->prop_id, buf_id, buf_type);  in gsc_dst_set_addr()
1178 	if (buf_id > GSC_MAX_DST) {  in gsc_dst_set_addr()
1179 		dev_info(ippdrv->dev, "invalid buf_id %d.\n", buf_id);  in gsc_dst_set_addr()
1187 			GSC_OUT_BASE_ADDR_Y(buf_id));  in gsc_dst_set_addr()
1189 			GSC_OUT_BASE_ADDR_CB(buf_id));  in gsc_dst_set_addr()
1191 			GSC_OUT_BASE_ADDR_CR(buf_id));  in gsc_dst_set_addr()
1194 		gsc_write(0x0, GSC_OUT_BASE_ADDR_Y(buf_id));  in gsc_dst_set_addr()
1195 		gsc_write(0x0, GSC_OUT_BASE_ADDR_CB(buf_id));  in gsc_dst_set_addr()
1196 		gsc_write(0x0, GSC_OUT_BASE_ADDR_CR(buf_id));  in gsc_dst_set_addr()
1203 	return gsc_dst_set_buf_seq(ctx, buf_id, buf_type);  in gsc_dst_set_addr()
1231 	u32 buf_id = GSC_MAX_SRC;  in gsc_get_src_buf_index()  local
1241 			buf_id = i;  in gsc_get_src_buf_index()
1246 	if (buf_id == GSC_MAX_SRC) {  in gsc_get_src_buf_index()
1251 	ret = gsc_src_set_buf_seq(ctx, buf_id, IPP_BUF_DEQUEUE);  in gsc_get_src_buf_index()
1258 		curr_index, buf_id);  in gsc_get_src_buf_index()
1260 	return buf_id;  in gsc_get_src_buf_index()
1266 	u32 buf_id = GSC_MAX_DST;  in gsc_get_dst_buf_index()  local
1276 			buf_id = i;  in gsc_get_dst_buf_index()
1281 	if (buf_id == GSC_MAX_DST) {  in gsc_get_dst_buf_index()
1286 	ret = gsc_dst_set_buf_seq(ctx, buf_id, IPP_BUF_DEQUEUE);  in gsc_get_dst_buf_index()
1293 		curr_index, buf_id);  in gsc_get_dst_buf_index()
1295 	return buf_id;  in gsc_get_dst_buf_index()
1306 	int buf_id[EXYNOS_DRM_OPS_MAX];  in gsc_irq_handler()  local
1321 		buf_id[EXYNOS_DRM_OPS_SRC] = gsc_get_src_buf_index(ctx);  in gsc_irq_handler()
1322 		if (buf_id[EXYNOS_DRM_OPS_SRC] < 0)  in gsc_irq_handler()
1325 		buf_id[EXYNOS_DRM_OPS_DST] = gsc_get_dst_buf_index(ctx);  in gsc_irq_handler()
1326 		if (buf_id[EXYNOS_DRM_OPS_DST] < 0)  in gsc_irq_handler()
1330 			buf_id[EXYNOS_DRM_OPS_SRC], buf_id[EXYNOS_DRM_OPS_DST]);  in gsc_irq_handler()
1333 		event_work->buf_id[EXYNOS_DRM_OPS_SRC] =  in gsc_irq_handler()
1334 			buf_id[EXYNOS_DRM_OPS_SRC];  in gsc_irq_handler()
1335 		event_work->buf_id[EXYNOS_DRM_OPS_DST] =  in gsc_irq_handler()
1336 			buf_id[EXYNOS_DRM_OPS_DST];  in gsc_irq_handler()