93 	unsigned int timing_base;  member
106 	.timing_base = 0x0,
112 	.timing_base = 0x20000,
120 	.timing_base = 0x0,
129 	.timing_base = 0x20000,
139 	.timing_base = 0x20000,
384 	void *timing_base = ctx->regs + driver_data->timing_base;  in fimd_commit()  local
396 		writel(val, timing_base + I80IFCONFAx(0));  in fimd_commit()
399 		writel(0, timing_base + I80IFCONFBx(0));  in fimd_commit()
420 		writel(vidcon1, ctx->regs + driver_data->timing_base + VIDCON1);  in fimd_commit()
430 		writel(val, ctx->regs + driver_data->timing_base + VIDTCON0);  in fimd_commit()
440 		writel(val, ctx->regs + driver_data->timing_base + VIDTCON1);  in fimd_commit()
444 		writel(ctx->vidout_con, timing_base + VIDOUT_CON);  in fimd_commit()
460 	writel(val, ctx->regs + driver_data->timing_base + VIDTCON2);  in fimd_commit()
810 	void *timing_base = ctx->regs + driver_data->timing_base;  in fimd_trigger()  local
823 	reg = readl(timing_base + TRIGCON);  in fimd_trigger()
825 	writel(reg, timing_base + TRIGCON);  in fimd_trigger()