171 	struct fimd_driver_data *driver_data;  member
329 			if (ctx->driver_data->has_shadowcon)  in fimd_clear_channels()
383 	struct fimd_driver_data *driver_data = ctx->driver_data;  in fimd_commit()  local
384 	void *timing_base = ctx->regs + driver_data->timing_base;  in fimd_commit()
402 		if (driver_data->has_vtsel && ctx->sysreg &&  in fimd_commit()
404 					driver_data->lcdblk_offset,  in fimd_commit()
405 					0x3 << driver_data->lcdblk_vt_shift,  in fimd_commit()
406 					0x1 << driver_data->lcdblk_vt_shift)) {  in fimd_commit()
420 		writel(vidcon1, ctx->regs + driver_data->timing_base + VIDCON1);  in fimd_commit()
430 		writel(val, ctx->regs + driver_data->timing_base + VIDTCON0);  in fimd_commit()
440 		writel(val, ctx->regs + driver_data->timing_base + VIDTCON1);  in fimd_commit()
443 	if (driver_data->has_vidoutcon)  in fimd_commit()
448 				driver_data->lcdblk_offset,  in fimd_commit()
449 				0x1 << driver_data->lcdblk_bypass_shift,  in fimd_commit()
450 				0x1 << driver_data->lcdblk_bypass_shift)) {  in fimd_commit()
460 	writel(val, ctx->regs + driver_data->timing_base + VIDTCON2);  in fimd_commit()
469 	if (ctx->driver_data->has_clksel)  in fimd_commit()
491 	if (ctx->driver_data->has_limited_fmt && !win) {  in fimd_win_set_pixfmt()
602 	if (ctx->driver_data->has_shadowcon) {  in fimd_shadow_protect_win()
723 	if (ctx->driver_data->has_shadowcon)  in fimd_update_plane()
741 	if (ctx->driver_data->has_shadowcon)  in fimd_disable_plane()
809 	struct fimd_driver_data *driver_data = ctx->driver_data;  in fimd_trigger()  local
810 	void *timing_base = ctx->regs + driver_data->timing_base;  in fimd_trigger()
870 	if (ctx->driver_data != &exynos5_fimd_driver_data)  in fimd_dp_clock_enable()
1015 	ctx->driver_data = drm_fimd_get_driver_data(pdev);  in fimd_probe()
1028 		if (ctx->driver_data->has_vidoutcon)  in fimd_probe()