209 	struct fimd_context *ctx = crtc->ctx;  in fimd_enable_vblank()  local
212 	if (ctx->suspended)  in fimd_enable_vblank()
215 	if (!test_and_set_bit(0, &ctx->irq_flags)) {  in fimd_enable_vblank()
216 		val = readl(ctx->regs + VIDINTCON0);  in fimd_enable_vblank()
220 		if (ctx->i80_if) {  in fimd_enable_vblank()
233 		writel(val, ctx->regs + VIDINTCON0);  in fimd_enable_vblank()
241 	struct fimd_context *ctx = crtc->ctx;  in fimd_disable_vblank()  local
244 	if (ctx->suspended)  in fimd_disable_vblank()
247 	if (test_and_clear_bit(0, &ctx->irq_flags)) {  in fimd_disable_vblank()
248 		val = readl(ctx->regs + VIDINTCON0);  in fimd_disable_vblank()
252 		if (ctx->i80_if) {  in fimd_disable_vblank()
259 		writel(val, ctx->regs + VIDINTCON0);  in fimd_disable_vblank()
265 	struct fimd_context *ctx = crtc->ctx;  in fimd_wait_for_vblank()  local
267 	if (ctx->suspended)  in fimd_wait_for_vblank()
270 	atomic_set(&ctx->wait_vsync_event, 1);  in fimd_wait_for_vblank()
276 	if (!wait_event_timeout(ctx->wait_vsync_queue,  in fimd_wait_for_vblank()
277 				!atomic_read(&ctx->wait_vsync_event),  in fimd_wait_for_vblank()
282 static void fimd_enable_video_output(struct fimd_context *ctx, unsigned int win,  in fimd_enable_video_output()  argument
285 	u32 val = readl(ctx->regs + WINCON(win));  in fimd_enable_video_output()
292 	writel(val, ctx->regs + WINCON(win));  in fimd_enable_video_output()
295 static void fimd_enable_shadow_channel_path(struct fimd_context *ctx,  in fimd_enable_shadow_channel_path()  argument
299 	u32 val = readl(ctx->regs + SHADOWCON);  in fimd_enable_shadow_channel_path()
306 	writel(val, ctx->regs + SHADOWCON);  in fimd_enable_shadow_channel_path()
311 	struct fimd_context *ctx = crtc->ctx;  in fimd_clear_channels()  local
317 	pm_runtime_get_sync(ctx->dev);  in fimd_clear_channels()
319 	clk_prepare_enable(ctx->bus_clk);  in fimd_clear_channels()
320 	clk_prepare_enable(ctx->lcd_clk);  in fimd_clear_channels()
324 		u32 val = readl(ctx->regs + WINCON(win));  in fimd_clear_channels()
327 			fimd_enable_video_output(ctx, win, false);  in fimd_clear_channels()
329 			if (ctx->driver_data->has_shadowcon)  in fimd_clear_channels()
330 				fimd_enable_shadow_channel_path(ctx, win,  in fimd_clear_channels()
339 		int pipe = ctx->pipe;  in fimd_clear_channels()
342 		ctx->suspended = false;  in fimd_clear_channels()
343 		ctx->pipe = -1;  in fimd_clear_channels()
345 		fimd_enable_vblank(ctx->crtc);  in fimd_clear_channels()
346 		fimd_wait_for_vblank(ctx->crtc);  in fimd_clear_channels()
347 		fimd_disable_vblank(ctx->crtc);  in fimd_clear_channels()
349 		ctx->suspended = true;  in fimd_clear_channels()
350 		ctx->pipe = pipe;  in fimd_clear_channels()
353 	clk_disable_unprepare(ctx->lcd_clk);  in fimd_clear_channels()
354 	clk_disable_unprepare(ctx->bus_clk);  in fimd_clear_channels()
356 	pm_runtime_put(ctx->dev);  in fimd_clear_channels()
359 static u32 fimd_calc_clkdiv(struct fimd_context *ctx,  in fimd_calc_clkdiv()  argument
365 	if (ctx->i80_if) {  in fimd_calc_clkdiv()
374 	clkdiv = DIV_ROUND_UP(clk_get_rate(ctx->lcd_clk), ideal_clk);  in fimd_calc_clkdiv()
381 	struct fimd_context *ctx = crtc->ctx;  in fimd_commit()  local
383 	struct fimd_driver_data *driver_data = ctx->driver_data;  in fimd_commit()
384 	void *timing_base = ctx->regs + driver_data->timing_base;  in fimd_commit()
387 	if (ctx->suspended)  in fimd_commit()
394 	if (ctx->i80_if) {  in fimd_commit()
395 		val = ctx->i80ifcon | I80IFEN_ENABLE;  in fimd_commit()
402 		if (driver_data->has_vtsel && ctx->sysreg &&  in fimd_commit()
403 				regmap_update_bits(ctx->sysreg,  in fimd_commit()
415 		vidcon1 = ctx->vidcon1;  in fimd_commit()
420 		writel(vidcon1, ctx->regs + driver_data->timing_base + VIDCON1);  in fimd_commit()
430 		writel(val, ctx->regs + driver_data->timing_base + VIDTCON0);  in fimd_commit()
440 		writel(val, ctx->regs + driver_data->timing_base + VIDTCON1);  in fimd_commit()
444 		writel(ctx->vidout_con, timing_base + VIDOUT_CON);  in fimd_commit()
447 	if (ctx->sysreg && regmap_update_bits(ctx->sysreg,  in fimd_commit()
460 	writel(val, ctx->regs + driver_data->timing_base + VIDTCON2);  in fimd_commit()
466 	val = ctx->vidcon0;  in fimd_commit()
469 	if (ctx->driver_data->has_clksel)  in fimd_commit()
472 	clkdiv = fimd_calc_clkdiv(ctx, mode);  in fimd_commit()
476 	writel(val, ctx->regs + VIDCON0);  in fimd_commit()
480 static void fimd_win_set_pixfmt(struct fimd_context *ctx, unsigned int win,  in fimd_win_set_pixfmt()  argument
491 	if (ctx->driver_data->has_limited_fmt && !win) {  in fimd_win_set_pixfmt()
547 	writel(val, ctx->regs + WINCON(win));  in fimd_win_set_pixfmt()
559 		writel(val, ctx->regs + VIDOSD_C(win));  in fimd_win_set_pixfmt()
563 		writel(val, ctx->regs + VIDWnALPHA0(win));  in fimd_win_set_pixfmt()
564 		writel(val, ctx->regs + VIDWnALPHA1(win));  in fimd_win_set_pixfmt()
568 static void fimd_win_set_colkey(struct fimd_context *ctx, unsigned int win)  in fimd_win_set_colkey()  argument
577 	writel(keycon0, ctx->regs + WKEYCON0_BASE(win));  in fimd_win_set_colkey()
578 	writel(keycon1, ctx->regs + WKEYCON1_BASE(win));  in fimd_win_set_colkey()
587 static void fimd_shadow_protect_win(struct fimd_context *ctx,  in fimd_shadow_protect_win()  argument
602 	if (ctx->driver_data->has_shadowcon) {  in fimd_shadow_protect_win()
610 	val = readl(ctx->regs + reg);  in fimd_shadow_protect_win()
615 	writel(val, ctx->regs + reg);  in fimd_shadow_protect_win()
621 	struct fimd_context *ctx = crtc->ctx;  in fimd_atomic_begin()  local
623 	if (ctx->suspended)  in fimd_atomic_begin()
626 	fimd_shadow_protect_win(ctx, plane->zpos, true);  in fimd_atomic_begin()
632 	struct fimd_context *ctx = crtc->ctx;  in fimd_atomic_flush()  local
634 	if (ctx->suspended)  in fimd_atomic_flush()
637 	fimd_shadow_protect_win(ctx, plane->zpos, false);  in fimd_atomic_flush()
643 	struct fimd_context *ctx = crtc->ctx;  in fimd_update_plane()  local
652 	if (ctx->suspended)  in fimd_update_plane()
661 	writel(val, ctx->regs + VIDWx_BUF_START(win, 0));  in fimd_update_plane()
666 	writel(val, ctx->regs + VIDWx_BUF_END(win, 0));  in fimd_update_plane()
680 	writel(val, ctx->regs + VIDWx_BUF_SIZE(win, 0));  in fimd_update_plane()
687 	writel(val, ctx->regs + VIDOSD_A(win));  in fimd_update_plane()
699 	writel(val, ctx->regs + VIDOSD_B(win));  in fimd_update_plane()
710 		writel(val, ctx->regs + offset);  in fimd_update_plane()
715 	fimd_win_set_pixfmt(ctx, win, state->fb);  in fimd_update_plane()
719 		fimd_win_set_colkey(ctx, win);  in fimd_update_plane()
721 	fimd_enable_video_output(ctx, win, true);  in fimd_update_plane()
723 	if (ctx->driver_data->has_shadowcon)  in fimd_update_plane()
724 		fimd_enable_shadow_channel_path(ctx, win, true);  in fimd_update_plane()
726 	if (ctx->i80_if)  in fimd_update_plane()
727 		atomic_set(&ctx->win_updated, 1);  in fimd_update_plane()
733 	struct fimd_context *ctx = crtc->ctx;  in fimd_disable_plane()  local
736 	if (ctx->suspended)  in fimd_disable_plane()
739 	fimd_enable_video_output(ctx, win, false);  in fimd_disable_plane()
741 	if (ctx->driver_data->has_shadowcon)  in fimd_disable_plane()
742 		fimd_enable_shadow_channel_path(ctx, win, false);  in fimd_disable_plane()
747 	struct fimd_context *ctx = crtc->ctx;  in fimd_enable()  local
750 	if (!ctx->suspended)  in fimd_enable()
753 	ctx->suspended = false;  in fimd_enable()
755 	pm_runtime_get_sync(ctx->dev);  in fimd_enable()
757 	ret = clk_prepare_enable(ctx->bus_clk);  in fimd_enable()
763 	ret = clk_prepare_enable(ctx->lcd_clk);  in fimd_enable()
770 	if (test_and_clear_bit(0, &ctx->irq_flags))  in fimd_enable()
771 		fimd_enable_vblank(ctx->crtc);  in fimd_enable()
773 	fimd_commit(ctx->crtc);  in fimd_enable()
778 	struct fimd_context *ctx = crtc->ctx;  in fimd_disable()  local
781 	if (ctx->suspended)  in fimd_disable()
790 		fimd_disable_plane(crtc, &ctx->planes[i]);  in fimd_disable()
796 	writel(0, ctx->regs + VIDCON0);  in fimd_disable()
798 	clk_disable_unprepare(ctx->lcd_clk);  in fimd_disable()
799 	clk_disable_unprepare(ctx->bus_clk);  in fimd_disable()
801 	pm_runtime_put_sync(ctx->dev);  in fimd_disable()
803 	ctx->suspended = true;  in fimd_disable()
808 	struct fimd_context *ctx = dev_get_drvdata(dev);  in fimd_trigger()  local
809 	struct fimd_driver_data *driver_data = ctx->driver_data;  in fimd_trigger()
810 	void *timing_base = ctx->regs + driver_data->timing_base;  in fimd_trigger()
817 	if (atomic_read(&ctx->triggering))  in fimd_trigger()
821 	atomic_set(&ctx->triggering, 1);  in fimd_trigger()
831 	if (!test_bit(0, &ctx->irq_flags))  in fimd_trigger()
832 		atomic_set(&ctx->triggering, 0);  in fimd_trigger()
837 	struct fimd_context *ctx = crtc->ctx;  in fimd_te_handler()  local
840 	if (ctx->pipe < 0 || !ctx->drm_dev)  in fimd_te_handler()
847 	if (atomic_add_unless(&ctx->win_updated, -1, 0))  in fimd_te_handler()
848 		fimd_trigger(ctx->dev);  in fimd_te_handler()
851 	if (atomic_read(&ctx->wait_vsync_event)) {  in fimd_te_handler()
852 		atomic_set(&ctx->wait_vsync_event, 0);  in fimd_te_handler()
853 		wake_up(&ctx->wait_vsync_queue);  in fimd_te_handler()
856 	if (test_bit(0, &ctx->irq_flags))  in fimd_te_handler()
857 		drm_crtc_handle_vblank(&ctx->crtc->base);  in fimd_te_handler()
862 	struct fimd_context *ctx = crtc->ctx;  in fimd_dp_clock_enable()  local
870 	if (ctx->driver_data != &exynos5_fimd_driver_data)  in fimd_dp_clock_enable()
874 	writel(val, ctx->regs + DP_MIE_CLKCON);  in fimd_dp_clock_enable()
894 	struct fimd_context *ctx = (struct fimd_context *)dev_id;  in fimd_irq_handler()  local
898 	val = readl(ctx->regs + VIDINTCON1);  in fimd_irq_handler()
900 	clear_bit = ctx->i80_if ? VIDINTCON1_INT_I80 : VIDINTCON1_INT_FRAME;  in fimd_irq_handler()
902 		writel(clear_bit, ctx->regs + VIDINTCON1);  in fimd_irq_handler()
905 	if (ctx->pipe < 0 || !ctx->drm_dev)  in fimd_irq_handler()
908 	if (!ctx->i80_if)  in fimd_irq_handler()
909 		drm_crtc_handle_vblank(&ctx->crtc->base);  in fimd_irq_handler()
912 		struct exynos_drm_plane *plane = &ctx->planes[win];  in fimd_irq_handler()
917 		start = readl(ctx->regs + VIDWx_BUF_START(win, 0));  in fimd_irq_handler()
918 		start_s = readl(ctx->regs + VIDWx_BUF_START_S(win, 0));  in fimd_irq_handler()
920 			exynos_drm_crtc_finish_update(ctx->crtc, plane);  in fimd_irq_handler()
923 	if (ctx->i80_if) {  in fimd_irq_handler()
925 		atomic_set(&ctx->triggering, 0);  in fimd_irq_handler()
928 		if (atomic_read(&ctx->wait_vsync_event)) {  in fimd_irq_handler()
929 			atomic_set(&ctx->wait_vsync_event, 0);  in fimd_irq_handler()
930 			wake_up(&ctx->wait_vsync_queue);  in fimd_irq_handler()
940 	struct fimd_context *ctx = dev_get_drvdata(dev);  in fimd_bind()  local
948 	ctx->drm_dev = drm_dev;  in fimd_bind()
949 	ctx->pipe = priv->pipe++;  in fimd_bind()
953 		ret = exynos_plane_init(drm_dev, &ctx->planes[zpos],  in fimd_bind()
954 					1 << ctx->pipe, type, fimd_formats,  in fimd_bind()
960 	exynos_plane = &ctx->planes[DEFAULT_WIN];  in fimd_bind()
961 	ctx->crtc = exynos_drm_crtc_create(drm_dev, &exynos_plane->base,  in fimd_bind()
962 					   ctx->pipe, EXYNOS_DISPLAY_TYPE_LCD,  in fimd_bind()
963 					   &fimd_crtc_ops, ctx);  in fimd_bind()
964 	if (IS_ERR(ctx->crtc))  in fimd_bind()
965 		return PTR_ERR(ctx->crtc);  in fimd_bind()
967 	if (ctx->encoder)  in fimd_bind()
968 		exynos_dpi_bind(drm_dev, ctx->encoder);  in fimd_bind()
971 		fimd_clear_channels(ctx->crtc);  in fimd_bind()
983 	struct fimd_context *ctx = dev_get_drvdata(dev);  in fimd_unbind()  local
985 	fimd_disable(ctx->crtc);  in fimd_unbind()
987 	drm_iommu_detach_device(ctx->drm_dev, ctx->dev);  in fimd_unbind()
989 	if (ctx->encoder)  in fimd_unbind()
990 		exynos_dpi_remove(ctx->encoder);  in fimd_unbind()
1001 	struct fimd_context *ctx;  in fimd_probe()  local
1009 	ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);  in fimd_probe()
1010 	if (!ctx)  in fimd_probe()
1013 	ctx->dev = dev;  in fimd_probe()
1014 	ctx->suspended = true;  in fimd_probe()
1015 	ctx->driver_data = drm_fimd_get_driver_data(pdev);  in fimd_probe()
1018 		ctx->vidcon1 |= VIDCON1_INV_VDEN;  in fimd_probe()
1020 		ctx->vidcon1 |= VIDCON1_INV_VCLK;  in fimd_probe()
1026 		ctx->i80_if = true;  in fimd_probe()
1028 		if (ctx->driver_data->has_vidoutcon)  in fimd_probe()
1029 			ctx->vidout_con |= VIDOUT_CON_F_I80_LDI0;  in fimd_probe()
1031 			ctx->vidcon0 |= VIDCON0_VIDOUT_I80_LDI0;  in fimd_probe()
1036 		ctx->vidcon0 |= VIDCON0_DSI_EN;  in fimd_probe()
1040 		ctx->i80ifcon = LCD_CS_SETUP(val);  in fimd_probe()
1043 		ctx->i80ifcon |= LCD_WR_SETUP(val);  in fimd_probe()
1046 		ctx->i80ifcon |= LCD_WR_ACTIVE(val);  in fimd_probe()
1049 		ctx->i80ifcon |= LCD_WR_HOLD(val);  in fimd_probe()
1053 	ctx->sysreg = syscon_regmap_lookup_by_phandle(dev->of_node,  in fimd_probe()
1055 	if (IS_ERR(ctx->sysreg)) {  in fimd_probe()
1057 		ctx->sysreg = NULL;  in fimd_probe()
1060 	ctx->bus_clk = devm_clk_get(dev, "fimd");  in fimd_probe()
1061 	if (IS_ERR(ctx->bus_clk)) {  in fimd_probe()
1063 		return PTR_ERR(ctx->bus_clk);  in fimd_probe()
1066 	ctx->lcd_clk = devm_clk_get(dev, "sclk_fimd");  in fimd_probe()
1067 	if (IS_ERR(ctx->lcd_clk)) {  in fimd_probe()
1069 		return PTR_ERR(ctx->lcd_clk);  in fimd_probe()
1074 	ctx->regs = devm_ioremap_resource(dev, res);  in fimd_probe()
1075 	if (IS_ERR(ctx->regs))  in fimd_probe()
1076 		return PTR_ERR(ctx->regs);  in fimd_probe()
1079 					   ctx->i80_if ? "lcd_sys" : "vsync");  in fimd_probe()
1086 							0, "drm_fimd", ctx);  in fimd_probe()
1092 	init_waitqueue_head(&ctx->wait_vsync_queue);  in fimd_probe()
1093 	atomic_set(&ctx->wait_vsync_event, 0);  in fimd_probe()
1095 	platform_set_drvdata(pdev, ctx);  in fimd_probe()
1097 	ctx->encoder = exynos_dpi_probe(dev);  in fimd_probe()
1098 	if (IS_ERR(ctx->encoder))  in fimd_probe()
1099 		return PTR_ERR(ctx->encoder);  in fimd_probe()