78 	writel(val, ctx->addr + reg);  in decon_set_bits()
96 		writel(val, ctx->addr + DECON_VIDINTCON0);  in decon_enable_vblank()
110 		writel(0, ctx->addr + DECON_VIDINTCON0);  in decon_disable_vblank()
120 	writel(val, ctx->addr + DECON_TRIGCON);  in decon_setup_trigger()
143 	writel(val, ctx->addr + DECON_CMU);  in decon_commit()
151 	writel(val, ctx->addr + DECON_VIDOUTCON0);  in decon_commit()
155 	writel(val, ctx->addr + DECON_VIDTCON2);  in decon_commit()
162 		writel(val, ctx->addr + DECON_VIDTCON00);  in decon_commit()
166 		writel(val, ctx->addr + DECON_VIDTCON01);  in decon_commit()
172 		writel(val, ctx->addr + DECON_VIDTCON10);  in decon_commit()
176 		writel(val, ctx->addr + DECON_VIDTCON11);  in decon_commit()
234 	writel(val, ctx->addr + DECON_WINCONx(win));  in decon_win_set_pixfmt()
273 	writel(val, ctx->addr + DECON_VIDOSDxA(win));  in decon_update_plane()
277 	writel(val, ctx->addr + DECON_VIDOSDxB(win));  in decon_update_plane()
281 	writel(val, ctx->addr + DECON_VIDOSDxC(win));  in decon_update_plane()
285 	writel(val, ctx->addr + DECON_VIDOSDxD(win));  in decon_update_plane()
287 	writel(plane->dma_addr[0], ctx->addr + DECON_VIDW0xADD0B0(win));  in decon_update_plane()
290 	writel(val, ctx->addr + DECON_VIDW0xADD1B0(win));  in decon_update_plane()
298 	writel(val, ctx->addr + DECON_VIDW0xADD2(win));  in decon_update_plane()
347 	writel(0, ctx->addr + DECON_VIDCON0);  in decon_swreset()
356 	writel(VIDCON0_SWRESET, ctx->addr + DECON_VIDCON0);  in decon_swreset()
368 	writel(VIDCON0_CLKVALUP | VIDCON0_VLCKFREE, ctx->addr + DECON_VIDCON0);  in decon_swreset()
371 	writel(VIDCON1_VCLK_RUN_VDEN_DISABLE, ctx->addr + DECON_VIDCON1);  in decon_swreset()
372 	writel(CRCCTRL_CRCEN | CRCCTRL_CRCSTART_F | CRCCTRL_CRCCLKEN,  in decon_swreset()
577 		writel(val, ctx->addr + DECON_VIDINTCON1);  in decon_irq_handler()