Lines Matching refs:writel_relaxed
118 writel_relaxed(val | regs->val, reg); in armada_drm_crtc_update_regs()
163 writel_relaxed(dumb_ctrl, dcrtc->base + LCD_SPU_DUMB_CTRL); in armada_drm_crtc_update()
426 writel_relaxed(dcrtc->v[i].spu_v_porch, base + LCD_SPU_V_PORCH); in armada_drm_crtc_irq()
427 writel_relaxed(dcrtc->v[i].spu_v_h_total, in armada_drm_crtc_irq()
433 writel_relaxed(val, base + LCD_SPU_ADV_REG); in armada_drm_crtc_irq()
437 writel_relaxed(dcrtc->cursor_hw_pos, in armada_drm_crtc_irq()
439 writel_relaxed(dcrtc->cursor_hw_sz, in armada_drm_crtc_irq()
465 writel_relaxed(0, dcrtc->base + LCD_SPU_IRQ_ISR); in armada_drm_irq()
576 writel_relaxed(val, dcrtc->base + LCD_SPU_DUMB_CTRL); in armada_drm_crtc_mode_set()
772 writel_relaxed(val, in armada_load_cursor_argb()
774 writel_relaxed(addr | SRAM_WRITE, in armada_load_cursor_argb()
792 writel_relaxed(0x55555555, base + LCD_SPU_SRAM_WRDAT); in armada_drm_crtc_cursor_tran()
793 writel_relaxed(addr | SRAM_WRITE | SRAM_HWC32_TRAN, in armada_drm_crtc_cursor_tran()
983 writel_relaxed(0, dcrtc->base + LCD_SPU_IRQ_ENA); in armada_drm_crtc_destroy()
1071 writel_relaxed(val, dcrtc->base + LCD_SPU_IOPAD_CONTROL); in armada_drm_crtc_set_property()
1170 writel_relaxed(0x00000001, dcrtc->base + LCD_CFG_SCLK_DIV); in armada_drm_crtc_create()
1171 writel_relaxed(0x00000000, dcrtc->base + LCD_SPU_BLANKCOLOR); in armada_drm_crtc_create()
1172 writel_relaxed(dcrtc->spu_iopad_ctrl, in armada_drm_crtc_create()
1174 writel_relaxed(0x00000000, dcrtc->base + LCD_SPU_SRAM_PARA0); in armada_drm_crtc_create()
1175 writel_relaxed(CFG_PDWN256x32 | CFG_PDWN256x24 | CFG_PDWN256x8 | in armada_drm_crtc_create()
1178 writel_relaxed(0x2032ff81, dcrtc->base + LCD_SPU_DMA_CTRL1); in armada_drm_crtc_create()
1179 writel_relaxed(0x00000000, dcrtc->base + LCD_SPU_GRA_OVSA_HPXL_VLN); in armada_drm_crtc_create()
1180 writel_relaxed(dcrtc->irq_ena, dcrtc->base + LCD_SPU_IRQ_ENA); in armada_drm_crtc_create()
1181 writel_relaxed(0, dcrtc->base + LCD_SPU_IRQ_ISR); in armada_drm_crtc_create()