Lines Matching refs:pr_debug
201 pr_debug("DIQ Created with queue id: %d\n", qid); in dbgdev_register_diq()
274 pr_debug("\t\t%20s %08x\n", "set reg mask :", cntl->bitfields.mask); in dbgdev_address_watch_set_registers()
275 pr_debug("\t\t%20s %08x\n", "set reg add high :", in dbgdev_address_watch_set_registers()
277 pr_debug("\t\t%20s %08x\n", "set reg add low :", in dbgdev_address_watch_set_registers()
320 pr_debug("\t\t%30s\n", "* * * * * * * * * * * * * * * * * *"); in dbgdev_address_watch_nodiq()
321 pr_debug("\t\t%20s %08x\n", "register index :", i); in dbgdev_address_watch_nodiq()
322 pr_debug("\t\t%20s %08x\n", "vmid is :", pdd->qpd.vmid); in dbgdev_address_watch_nodiq()
323 pr_debug("\t\t%20s %08x\n", "Address Low is :", in dbgdev_address_watch_nodiq()
325 pr_debug("\t\t%20s %08x\n", "Address high is :", in dbgdev_address_watch_nodiq()
327 pr_debug("\t\t%20s %08x\n", "Address high is :", in dbgdev_address_watch_nodiq()
329 pr_debug("\t\t%20s %08x\n", "Control Mask is :", in dbgdev_address_watch_nodiq()
331 pr_debug("\t\t%20s %08x\n", "Control Mode is :", in dbgdev_address_watch_nodiq()
333 pr_debug("\t\t%20s %08x\n", "Control Vmid is :", in dbgdev_address_watch_nodiq()
335 pr_debug("\t\t%20s %08x\n", "Control atc is :", in dbgdev_address_watch_nodiq()
337 pr_debug("\t\t%30s\n", "* * * * * * * * * * * * * * * * * *"); in dbgdev_address_watch_nodiq()
418 pr_debug("\t\t%30s\n", "* * * * * * * * * * * * * * * * * *"); in dbgdev_address_watch_diq()
419 pr_debug("\t\t%20s %08x\n", "register index :", i); in dbgdev_address_watch_diq()
420 pr_debug("\t\t%20s %08x\n", "vmid is :", vmid); in dbgdev_address_watch_diq()
421 pr_debug("\t\t%20s %p\n", "Add ptr is :", in dbgdev_address_watch_diq()
423 pr_debug("\t\t%20s %08llx\n", "Add is :", in dbgdev_address_watch_diq()
425 pr_debug("\t\t%20s %08x\n", "Address Low is :", in dbgdev_address_watch_diq()
427 pr_debug("\t\t%20s %08x\n", "Address high is :", in dbgdev_address_watch_diq()
429 pr_debug("\t\t%20s %08x\n", "Control Mask is :", in dbgdev_address_watch_diq()
431 pr_debug("\t\t%20s %08x\n", "Control Mode is :", in dbgdev_address_watch_diq()
433 pr_debug("\t\t%20s %08x\n", "Control Vmid is :", in dbgdev_address_watch_diq()
435 pr_debug("\t\t%20s %08x\n", "Control atc is :", in dbgdev_address_watch_diq()
437 pr_debug("\t\t%30s\n", "* * * * * * * * * * * * * * * * * *"); in dbgdev_address_watch_diq()
637 pr_debug("\t\t %30s\n", "* * * * * * * * * * * * * * * * * *"); in dbgdev_wave_control_diq()
639 pr_debug("\t\t mode is: %u\n", wac_info->mode); in dbgdev_wave_control_diq()
640 pr_debug("\t\t operand is: %u\n", wac_info->operand); in dbgdev_wave_control_diq()
641 pr_debug("\t\t trap id is: %u\n", wac_info->trapId); in dbgdev_wave_control_diq()
642 pr_debug("\t\t msg value is: %u\n", in dbgdev_wave_control_diq()
644 pr_debug("\t\t vmid is: N/A\n"); in dbgdev_wave_control_diq()
646 pr_debug("\t\t chk_vmid is : %u\n", reg_sq_cmd.bitfields.check_vmid); in dbgdev_wave_control_diq()
647 pr_debug("\t\t command is : %u\n", reg_sq_cmd.bitfields.cmd); in dbgdev_wave_control_diq()
648 pr_debug("\t\t queue id is : %u\n", reg_sq_cmd.bitfields.queue_id); in dbgdev_wave_control_diq()
649 pr_debug("\t\t simd id is : %u\n", reg_sq_cmd.bitfields.simd_id); in dbgdev_wave_control_diq()
650 pr_debug("\t\t mode is : %u\n", reg_sq_cmd.bitfields.mode); in dbgdev_wave_control_diq()
651 pr_debug("\t\t vm_id is : %u\n", reg_sq_cmd.bitfields.vm_id); in dbgdev_wave_control_diq()
652 pr_debug("\t\t wave_id is : %u\n", reg_sq_cmd.bitfields.wave_id); in dbgdev_wave_control_diq()
654 pr_debug("\t\t ibw is : %u\n", in dbgdev_wave_control_diq()
656 pr_debug("\t\t ii is : %u\n", in dbgdev_wave_control_diq()
658 pr_debug("\t\t sebw is : %u\n", in dbgdev_wave_control_diq()
660 pr_debug("\t\t se_ind is : %u\n", reg_gfx_index.bitfields.se_index); in dbgdev_wave_control_diq()
661 pr_debug("\t\t sh_ind is : %u\n", reg_gfx_index.bitfields.sh_index); in dbgdev_wave_control_diq()
662 pr_debug("\t\t sbw is : %u\n", in dbgdev_wave_control_diq()
665 pr_debug("\t\t %30s\n", "* * * * * * * * * * * * * * * * * *"); in dbgdev_wave_control_diq()
760 pr_debug("\t\t %30s\n", "* * * * * * * * * * * * * * * * * *"); in dbgdev_wave_control_nodiq()
762 pr_debug("\t\t mode is: %u\n", wac_info->mode); in dbgdev_wave_control_nodiq()
763 pr_debug("\t\t operand is: %u\n", wac_info->operand); in dbgdev_wave_control_nodiq()
764 pr_debug("\t\t trap id is: %u\n", wac_info->trapId); in dbgdev_wave_control_nodiq()
765 pr_debug("\t\t msg value is: %u\n", in dbgdev_wave_control_nodiq()
767 pr_debug("\t\t vmid is: %u\n", pdd->qpd.vmid); in dbgdev_wave_control_nodiq()
769 pr_debug("\t\t chk_vmid is : %u\n", reg_sq_cmd.bitfields.check_vmid); in dbgdev_wave_control_nodiq()
770 pr_debug("\t\t command is : %u\n", reg_sq_cmd.bitfields.cmd); in dbgdev_wave_control_nodiq()
771 pr_debug("\t\t queue id is : %u\n", reg_sq_cmd.bitfields.queue_id); in dbgdev_wave_control_nodiq()
772 pr_debug("\t\t simd id is : %u\n", reg_sq_cmd.bitfields.simd_id); in dbgdev_wave_control_nodiq()
773 pr_debug("\t\t mode is : %u\n", reg_sq_cmd.bitfields.mode); in dbgdev_wave_control_nodiq()
774 pr_debug("\t\t vm_id is : %u\n", reg_sq_cmd.bitfields.vm_id); in dbgdev_wave_control_nodiq()
775 pr_debug("\t\t wave_id is : %u\n", reg_sq_cmd.bitfields.wave_id); in dbgdev_wave_control_nodiq()
777 pr_debug("\t\t ibw is : %u\n", in dbgdev_wave_control_nodiq()
779 pr_debug("\t\t ii is : %u\n", in dbgdev_wave_control_nodiq()
781 pr_debug("\t\t sebw is : %u\n", in dbgdev_wave_control_nodiq()
783 pr_debug("\t\t se_ind is : %u\n", reg_gfx_index.bitfields.se_index); in dbgdev_wave_control_nodiq()
784 pr_debug("\t\t sh_ind is : %u\n", reg_gfx_index.bitfields.sh_index); in dbgdev_wave_control_nodiq()
785 pr_debug("\t\t sbw is : %u\n", in dbgdev_wave_control_nodiq()
788 pr_debug("\t\t %30s\n", "* * * * * * * * * * * * * * * * * *"); in dbgdev_wave_control_nodiq()
817 pr_debug("Killing all process wavefronts\n"); in dbgdev_wave_reset_wavefronts()
828 pr_debug("Killing wave fronts of vmid %d and pasid %d\n", in dbgdev_wave_reset_wavefronts()