55 static uint32_t vce_v2_0_ring_get_rptr(struct amdgpu_ring *ring)  in vce_v2_0_ring_get_rptr()  argument
57 	struct amdgpu_device *adev = ring->adev;  in vce_v2_0_ring_get_rptr()
59 	if (ring == &adev->vce.ring[0])  in vce_v2_0_ring_get_rptr()
72 static uint32_t vce_v2_0_ring_get_wptr(struct amdgpu_ring *ring)  in vce_v2_0_ring_get_wptr()  argument
74 	struct amdgpu_device *adev = ring->adev;  in vce_v2_0_ring_get_wptr()
76 	if (ring == &adev->vce.ring[0])  in vce_v2_0_ring_get_wptr()
89 static void vce_v2_0_ring_set_wptr(struct amdgpu_ring *ring)  in vce_v2_0_ring_set_wptr()  argument
91 	struct amdgpu_device *adev = ring->adev;  in vce_v2_0_ring_set_wptr()
93 	if (ring == &adev->vce.ring[0])  in vce_v2_0_ring_set_wptr()
94 		WREG32(mmVCE_RB_WPTR, ring->wptr);  in vce_v2_0_ring_set_wptr()
96 		WREG32(mmVCE_RB_WPTR2, ring->wptr);  in vce_v2_0_ring_set_wptr()
108 	struct amdgpu_ring *ring;  in vce_v2_0_start()  local
116 	ring = &adev->vce.ring[0];  in vce_v2_0_start()
117 	WREG32(mmVCE_RB_RPTR, ring->wptr);  in vce_v2_0_start()
118 	WREG32(mmVCE_RB_WPTR, ring->wptr);  in vce_v2_0_start()
119 	WREG32(mmVCE_RB_BASE_LO, ring->gpu_addr);  in vce_v2_0_start()
120 	WREG32(mmVCE_RB_BASE_HI, upper_32_bits(ring->gpu_addr));  in vce_v2_0_start()
121 	WREG32(mmVCE_RB_SIZE, ring->ring_size / 4);  in vce_v2_0_start()
123 	ring = &adev->vce.ring[1];  in vce_v2_0_start()
124 	WREG32(mmVCE_RB_RPTR2, ring->wptr);  in vce_v2_0_start()
125 	WREG32(mmVCE_RB_WPTR2, ring->wptr);  in vce_v2_0_start()
126 	WREG32(mmVCE_RB_BASE_LO2, ring->gpu_addr);  in vce_v2_0_start()
127 	WREG32(mmVCE_RB_BASE_HI2, upper_32_bits(ring->gpu_addr));  in vce_v2_0_start()
128 	WREG32(mmVCE_RB_SIZE2, ring->ring_size / 4);  in vce_v2_0_start()
184 	struct amdgpu_ring *ring;  in vce_v2_0_sw_init()  local
202 	ring = &adev->vce.ring[0];  in vce_v2_0_sw_init()
203 	sprintf(ring->name, "vce0");  in vce_v2_0_sw_init()
204 	r = amdgpu_ring_init(adev, ring, 4096, VCE_CMD_NO_OP, 0xf,  in vce_v2_0_sw_init()
209 	ring = &adev->vce.ring[1];  in vce_v2_0_sw_init()
210 	sprintf(ring->name, "vce1");  in vce_v2_0_sw_init()
211 	r = amdgpu_ring_init(adev, ring, 4096, VCE_CMD_NO_OP, 0xf,  in vce_v2_0_sw_init()
237 	struct amdgpu_ring *ring;  in vce_v2_0_hw_init()  local
245 	ring = &adev->vce.ring[0];  in vce_v2_0_hw_init()
246 	ring->ready = true;  in vce_v2_0_hw_init()
247 	r = amdgpu_ring_test_ring(ring);  in vce_v2_0_hw_init()
249 		ring->ready = false;  in vce_v2_0_hw_init()
253 	ring = &adev->vce.ring[1];  in vce_v2_0_hw_init()
254 	ring->ready = true;  in vce_v2_0_hw_init()
255 	r = amdgpu_ring_test_ring(ring);  in vce_v2_0_hw_init()
257 		ring->ready = false;  in vce_v2_0_hw_init()
571 		amdgpu_fence_process(&adev->vce.ring[0]);  in vce_v2_0_process_interrupt()
574 		amdgpu_fence_process(&adev->vce.ring[1]);  in vce_v2_0_process_interrupt()
650 	adev->vce.ring[0].funcs = &vce_v2_0_ring_funcs;  in vce_v2_0_set_ring_funcs()
651 	adev->vce.ring[1].funcs = &vce_v2_0_ring_funcs;  in vce_v2_0_set_ring_funcs()