44 static void vce_v2_0_mc_resume(struct amdgpu_device *adev);
45 static void vce_v2_0_set_ring_funcs(struct amdgpu_device *adev);
46 static void vce_v2_0_set_irq_funcs(struct amdgpu_device *adev);
57 	struct amdgpu_device *adev = ring->adev;  in vce_v2_0_ring_get_rptr()  local
59 	if (ring == &adev->vce.ring[0])  in vce_v2_0_ring_get_rptr()
74 	struct amdgpu_device *adev = ring->adev;  in vce_v2_0_ring_get_wptr()  local
76 	if (ring == &adev->vce.ring[0])  in vce_v2_0_ring_get_wptr()
91 	struct amdgpu_device *adev = ring->adev;  in vce_v2_0_ring_set_wptr()  local
93 	if (ring == &adev->vce.ring[0])  in vce_v2_0_ring_set_wptr()
106 static int vce_v2_0_start(struct amdgpu_device *adev)  in vce_v2_0_start()  argument
111 	vce_v2_0_mc_resume(adev);  in vce_v2_0_start()
116 	ring = &adev->vce.ring[0];  in vce_v2_0_start()
123 	ring = &adev->vce.ring[1];  in vce_v2_0_start()
174 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in vce_v2_0_early_init()  local
176 	vce_v2_0_set_ring_funcs(adev);  in vce_v2_0_early_init()
177 	vce_v2_0_set_irq_funcs(adev);  in vce_v2_0_early_init()
186 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in vce_v2_0_sw_init()  local
189 	r = amdgpu_irq_add_id(adev, 167, &adev->vce.irq);  in vce_v2_0_sw_init()
193 	r = amdgpu_vce_sw_init(adev, VCE_V2_0_FW_SIZE +  in vce_v2_0_sw_init()
198 	r = amdgpu_vce_resume(adev);  in vce_v2_0_sw_init()
202 	ring = &adev->vce.ring[0];  in vce_v2_0_sw_init()
204 	r = amdgpu_ring_init(adev, ring, 4096, VCE_CMD_NO_OP, 0xf,  in vce_v2_0_sw_init()
205 			     &adev->vce.irq, 0, AMDGPU_RING_TYPE_VCE);  in vce_v2_0_sw_init()
209 	ring = &adev->vce.ring[1];  in vce_v2_0_sw_init()
211 	r = amdgpu_ring_init(adev, ring, 4096, VCE_CMD_NO_OP, 0xf,  in vce_v2_0_sw_init()
212 			     &adev->vce.irq, 0, AMDGPU_RING_TYPE_VCE);  in vce_v2_0_sw_init()
222 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in vce_v2_0_sw_fini()  local
224 	r = amdgpu_vce_suspend(adev);  in vce_v2_0_sw_fini()
228 	r = amdgpu_vce_sw_fini(adev);  in vce_v2_0_sw_fini()
239 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in vce_v2_0_hw_init()  local
241 	r = vce_v2_0_start(adev);  in vce_v2_0_hw_init()
245 	ring = &adev->vce.ring[0];  in vce_v2_0_hw_init()
253 	ring = &adev->vce.ring[1];  in vce_v2_0_hw_init()
274 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in vce_v2_0_suspend()  local
276 	r = vce_v2_0_hw_fini(adev);  in vce_v2_0_suspend()
280 	r = amdgpu_vce_suspend(adev);  in vce_v2_0_suspend()
290 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in vce_v2_0_resume()  local
292 	r = amdgpu_vce_resume(adev);  in vce_v2_0_resume()
296 	r = vce_v2_0_hw_init(adev);  in vce_v2_0_resume()
303 static void vce_v2_0_set_sw_cg(struct amdgpu_device *adev, bool gated)  in vce_v2_0_set_sw_cg()  argument
338 static void vce_v2_0_set_dyn_cg(struct amdgpu_device *adev, bool gated)  in vce_v2_0_set_dyn_cg()  argument
367 static void vce_v2_0_disable_cg(struct amdgpu_device *adev)  in vce_v2_0_disable_cg()  argument
372 static void vce_v2_0_enable_mgcg(struct amdgpu_device *adev, bool enable)  in vce_v2_0_enable_mgcg()  argument
376 	if (enable && (adev->cg_flags & AMDGPU_CG_SUPPORT_VCE_MGCG)) {  in vce_v2_0_enable_mgcg()
378 			vce_v2_0_set_sw_cg(adev, true);  in vce_v2_0_enable_mgcg()
380 			vce_v2_0_set_dyn_cg(adev, true);  in vce_v2_0_enable_mgcg()
382 		vce_v2_0_disable_cg(adev);  in vce_v2_0_enable_mgcg()
385 			vce_v2_0_set_sw_cg(adev, false);  in vce_v2_0_enable_mgcg()
387 			vce_v2_0_set_dyn_cg(adev, false);  in vce_v2_0_enable_mgcg()
391 static void vce_v2_0_init_cg(struct amdgpu_device *adev)  in vce_v2_0_init_cg()  argument
412 static void vce_v2_0_mc_resume(struct amdgpu_device *adev)  in vce_v2_0_mc_resume()  argument
414 	uint64_t addr = adev->vce.gpu_addr;  in vce_v2_0_mc_resume()
448 	vce_v2_0_init_cg(adev);  in vce_v2_0_mc_resume()
453 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in vce_v2_0_is_idle()  local
461 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in vce_v2_0_wait_for_idle()  local
463 	for (i = 0; i < adev->usec_timeout; i++) {  in vce_v2_0_wait_for_idle()
472 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in vce_v2_0_soft_reset()  local
478 	return vce_v2_0_start(adev);  in vce_v2_0_soft_reset()
483 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in vce_v2_0_print_status()  local
485 	dev_info(adev->dev, "VCE 2.0 registers\n");  in vce_v2_0_print_status()
486 	dev_info(adev->dev, "  VCE_STATUS=0x%08X\n",  in vce_v2_0_print_status()
488 	dev_info(adev->dev, "  VCE_VCPU_CNTL=0x%08X\n",  in vce_v2_0_print_status()
490 	dev_info(adev->dev, "  VCE_VCPU_CACHE_OFFSET0=0x%08X\n",  in vce_v2_0_print_status()
492 	dev_info(adev->dev, "  VCE_VCPU_CACHE_SIZE0=0x%08X\n",  in vce_v2_0_print_status()
494 	dev_info(adev->dev, "  VCE_VCPU_CACHE_OFFSET1=0x%08X\n",  in vce_v2_0_print_status()
496 	dev_info(adev->dev, "  VCE_VCPU_CACHE_SIZE1=0x%08X\n",  in vce_v2_0_print_status()
498 	dev_info(adev->dev, "  VCE_VCPU_CACHE_OFFSET2=0x%08X\n",  in vce_v2_0_print_status()
500 	dev_info(adev->dev, "  VCE_VCPU_CACHE_SIZE2=0x%08X\n",  in vce_v2_0_print_status()
502 	dev_info(adev->dev, "  VCE_SOFT_RESET=0x%08X\n",  in vce_v2_0_print_status()
504 	dev_info(adev->dev, "  VCE_RB_BASE_LO2=0x%08X\n",  in vce_v2_0_print_status()
506 	dev_info(adev->dev, "  VCE_RB_BASE_HI2=0x%08X\n",  in vce_v2_0_print_status()
508 	dev_info(adev->dev, "  VCE_RB_SIZE2=0x%08X\n",  in vce_v2_0_print_status()
510 	dev_info(adev->dev, "  VCE_RB_RPTR2=0x%08X\n",  in vce_v2_0_print_status()
512 	dev_info(adev->dev, "  VCE_RB_WPTR2=0x%08X\n",  in vce_v2_0_print_status()
514 	dev_info(adev->dev, "  VCE_RB_BASE_LO=0x%08X\n",  in vce_v2_0_print_status()
516 	dev_info(adev->dev, "  VCE_RB_BASE_HI=0x%08X\n",  in vce_v2_0_print_status()
518 	dev_info(adev->dev, "  VCE_RB_SIZE=0x%08X\n",  in vce_v2_0_print_status()
520 	dev_info(adev->dev, "  VCE_RB_RPTR=0x%08X\n",  in vce_v2_0_print_status()
522 	dev_info(adev->dev, "  VCE_RB_WPTR=0x%08X\n",  in vce_v2_0_print_status()
524 	dev_info(adev->dev, "  VCE_CLOCK_GATING_A=0x%08X\n",  in vce_v2_0_print_status()
526 	dev_info(adev->dev, "  VCE_CLOCK_GATING_B=0x%08X\n",  in vce_v2_0_print_status()
528 	dev_info(adev->dev, "  VCE_CGTT_CLK_OVERRIDE=0x%08X\n",  in vce_v2_0_print_status()
530 	dev_info(adev->dev, "  VCE_UENC_CLOCK_GATING=0x%08X\n",  in vce_v2_0_print_status()
532 	dev_info(adev->dev, "  VCE_UENC_REG_CLOCK_GATING=0x%08X\n",  in vce_v2_0_print_status()
534 	dev_info(adev->dev, "  VCE_SYS_INT_EN=0x%08X\n",  in vce_v2_0_print_status()
536 	dev_info(adev->dev, "  VCE_LMI_CTRL2=0x%08X\n",  in vce_v2_0_print_status()
538 	dev_info(adev->dev, "  VCE_LMI_CTRL=0x%08X\n",  in vce_v2_0_print_status()
540 	dev_info(adev->dev, "  VCE_LMI_VM_CTRL=0x%08X\n",  in vce_v2_0_print_status()
542 	dev_info(adev->dev, "  VCE_LMI_SWAP_CNTL=0x%08X\n",  in vce_v2_0_print_status()
544 	dev_info(adev->dev, "  VCE_LMI_SWAP_CNTL1=0x%08X\n",  in vce_v2_0_print_status()
546 	dev_info(adev->dev, "  VCE_LMI_CACHE_CTRL=0x%08X\n",  in vce_v2_0_print_status()
550 static int vce_v2_0_set_interrupt_state(struct amdgpu_device *adev,  in vce_v2_0_set_interrupt_state()  argument
564 static int vce_v2_0_process_interrupt(struct amdgpu_device *adev,  in vce_v2_0_process_interrupt()  argument
571 		amdgpu_fence_process(&adev->vce.ring[0]);  in vce_v2_0_process_interrupt()
574 		amdgpu_fence_process(&adev->vce.ring[1]);  in vce_v2_0_process_interrupt()
589 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in vce_v2_0_set_clockgating_state()  local
594 	vce_v2_0_enable_mgcg(adev, gate);  in vce_v2_0_set_clockgating_state()
609 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in vce_v2_0_set_powergating_state()  local
615 		return vce_v2_0_start(adev);  in vce_v2_0_set_powergating_state()
648 static void vce_v2_0_set_ring_funcs(struct amdgpu_device *adev)  in vce_v2_0_set_ring_funcs()  argument
650 	adev->vce.ring[0].funcs = &vce_v2_0_ring_funcs;  in vce_v2_0_set_ring_funcs()
651 	adev->vce.ring[1].funcs = &vce_v2_0_ring_funcs;  in vce_v2_0_set_ring_funcs()
659 static void vce_v2_0_set_irq_funcs(struct amdgpu_device *adev)  in vce_v2_0_set_irq_funcs()  argument
661 	adev->vce.irq.num_types = 1;  in vce_v2_0_set_irq_funcs()
662 	adev->vce.irq.funcs = &vce_v2_0_irq_funcs;  in vce_v2_0_set_irq_funcs()