278 static uint32_t sdma_v3_0_ring_get_rptr(struct amdgpu_ring *ring)  in sdma_v3_0_ring_get_rptr()  argument
283 	rptr = ring->adev->wb.wb[ring->rptr_offs] >> 2;  in sdma_v3_0_ring_get_rptr()
295 static uint32_t sdma_v3_0_ring_get_wptr(struct amdgpu_ring *ring)  in sdma_v3_0_ring_get_wptr()  argument
297 	struct amdgpu_device *adev = ring->adev;  in sdma_v3_0_ring_get_wptr()
300 	if (ring->use_doorbell) {  in sdma_v3_0_ring_get_wptr()
302 		wptr = ring->adev->wb.wb[ring->wptr_offs] >> 2;  in sdma_v3_0_ring_get_wptr()
304 		int me = (ring == &ring->adev->sdma.instance[0].ring) ? 0 : 1;  in sdma_v3_0_ring_get_wptr()
319 static void sdma_v3_0_ring_set_wptr(struct amdgpu_ring *ring)  in sdma_v3_0_ring_set_wptr()  argument
321 	struct amdgpu_device *adev = ring->adev;  in sdma_v3_0_ring_set_wptr()
323 	if (ring->use_doorbell) {  in sdma_v3_0_ring_set_wptr()
325 		adev->wb.wb[ring->wptr_offs] = ring->wptr << 2;  in sdma_v3_0_ring_set_wptr()
326 		WDOORBELL32(ring->doorbell_index, ring->wptr << 2);  in sdma_v3_0_ring_set_wptr()
328 		int me = (ring == &ring->adev->sdma.instance[0].ring) ? 0 : 1;  in sdma_v3_0_ring_set_wptr()
330 		WREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[me], ring->wptr << 2);  in sdma_v3_0_ring_set_wptr()
334 static void sdma_v3_0_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count)  in sdma_v3_0_ring_insert_nop()  argument
336 	struct amdgpu_sdma_instance *sdma = amdgpu_get_sdma_instance(ring);  in sdma_v3_0_ring_insert_nop()
341 			amdgpu_ring_write(ring, ring->nop |  in sdma_v3_0_ring_insert_nop()
344 			amdgpu_ring_write(ring, ring->nop);  in sdma_v3_0_ring_insert_nop()
355 static void sdma_v3_0_ring_emit_ib(struct amdgpu_ring *ring,  in sdma_v3_0_ring_emit_ib()  argument
358 	u32 vmid = (ib->vm ? ib->vm->ids[ring->idx].id : 0) & 0xf;  in sdma_v3_0_ring_emit_ib()
359 	u32 next_rptr = ring->wptr + 5;  in sdma_v3_0_ring_emit_ib()
365 	amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |  in sdma_v3_0_ring_emit_ib()
367 	amdgpu_ring_write(ring, lower_32_bits(ring->next_rptr_gpu_addr) & 0xfffffffc);  in sdma_v3_0_ring_emit_ib()
368 	amdgpu_ring_write(ring, upper_32_bits(ring->next_rptr_gpu_addr));  in sdma_v3_0_ring_emit_ib()
369 	amdgpu_ring_write(ring, SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(1));  in sdma_v3_0_ring_emit_ib()
370 	amdgpu_ring_write(ring, next_rptr);  in sdma_v3_0_ring_emit_ib()
373 	sdma_v3_0_ring_insert_nop(ring, (10 - (ring->wptr & 7)) % 8);  in sdma_v3_0_ring_emit_ib()
375 	amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_INDIRECT) |  in sdma_v3_0_ring_emit_ib()
378 	amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0);  in sdma_v3_0_ring_emit_ib()
379 	amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));  in sdma_v3_0_ring_emit_ib()
380 	amdgpu_ring_write(ring, ib->length_dw);  in sdma_v3_0_ring_emit_ib()
381 	amdgpu_ring_write(ring, 0);  in sdma_v3_0_ring_emit_ib()
382 	amdgpu_ring_write(ring, 0);  in sdma_v3_0_ring_emit_ib()
393 static void sdma_v3_0_ring_emit_hdp_flush(struct amdgpu_ring *ring)  in sdma_v3_0_ring_emit_hdp_flush()  argument
397 	if (ring == &ring->adev->sdma.instance[0].ring)  in sdma_v3_0_ring_emit_hdp_flush()
402 	amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_POLL_REGMEM) |  in sdma_v3_0_ring_emit_hdp_flush()
405 	amdgpu_ring_write(ring, mmGPU_HDP_FLUSH_DONE << 2);  in sdma_v3_0_ring_emit_hdp_flush()
406 	amdgpu_ring_write(ring, mmGPU_HDP_FLUSH_REQ << 2);  in sdma_v3_0_ring_emit_hdp_flush()
407 	amdgpu_ring_write(ring, ref_and_mask); /* reference */  in sdma_v3_0_ring_emit_hdp_flush()
408 	amdgpu_ring_write(ring, ref_and_mask); /* mask */  in sdma_v3_0_ring_emit_hdp_flush()
409 	amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |  in sdma_v3_0_ring_emit_hdp_flush()
423 static void sdma_v3_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,  in sdma_v3_0_ring_emit_fence()  argument
428 	amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE));  in sdma_v3_0_ring_emit_fence()
429 	amdgpu_ring_write(ring, lower_32_bits(addr));  in sdma_v3_0_ring_emit_fence()
430 	amdgpu_ring_write(ring, upper_32_bits(addr));  in sdma_v3_0_ring_emit_fence()
431 	amdgpu_ring_write(ring, lower_32_bits(seq));  in sdma_v3_0_ring_emit_fence()
436 		amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE));  in sdma_v3_0_ring_emit_fence()
437 		amdgpu_ring_write(ring, lower_32_bits(addr));  in sdma_v3_0_ring_emit_fence()
438 		amdgpu_ring_write(ring, upper_32_bits(addr));  in sdma_v3_0_ring_emit_fence()
439 		amdgpu_ring_write(ring, upper_32_bits(seq));  in sdma_v3_0_ring_emit_fence()
443 	amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_TRAP));  in sdma_v3_0_ring_emit_fence()
444 	amdgpu_ring_write(ring, SDMA_PKT_TRAP_INT_CONTEXT_INT_CONTEXT(0));  in sdma_v3_0_ring_emit_fence()
458 static bool sdma_v3_0_ring_emit_semaphore(struct amdgpu_ring *ring,  in sdma_v3_0_ring_emit_semaphore()  argument
465 	amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_SEM) |  in sdma_v3_0_ring_emit_semaphore()
467 	amdgpu_ring_write(ring, lower_32_bits(addr) & 0xfffffff8);  in sdma_v3_0_ring_emit_semaphore()
468 	amdgpu_ring_write(ring, upper_32_bits(addr));  in sdma_v3_0_ring_emit_semaphore()
482 	struct amdgpu_ring *sdma0 = &adev->sdma.instance[0].ring;  in sdma_v3_0_gfx_stop()
483 	struct amdgpu_ring *sdma1 = &adev->sdma.instance[1].ring;  in sdma_v3_0_gfx_stop()
578 	struct amdgpu_ring *ring;  in sdma_v3_0_gfx_resume()  local
586 		ring = &adev->sdma.instance[i].ring;  in sdma_v3_0_gfx_resume()
587 		wb_offset = (ring->rptr_offs * 4);  in sdma_v3_0_gfx_resume()
602 		rb_bufsz = order_base_2(ring->ring_size / 4);  in sdma_v3_0_gfx_resume()
624 		WREG32(mmSDMA0_GFX_RB_BASE + sdma_offsets[i], ring->gpu_addr >> 8);  in sdma_v3_0_gfx_resume()
625 		WREG32(mmSDMA0_GFX_RB_BASE_HI + sdma_offsets[i], ring->gpu_addr >> 40);  in sdma_v3_0_gfx_resume()
627 		ring->wptr = 0;  in sdma_v3_0_gfx_resume()
628 		WREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[i], ring->wptr << 2);  in sdma_v3_0_gfx_resume()
632 		if (ring->use_doorbell) {  in sdma_v3_0_gfx_resume()
634 						 OFFSET, ring->doorbell_index);  in sdma_v3_0_gfx_resume()
653 		ring->ready = true;  in sdma_v3_0_gfx_resume()
655 		r = amdgpu_ring_test_ring(ring);  in sdma_v3_0_gfx_resume()
657 			ring->ready = false;  in sdma_v3_0_gfx_resume()
661 		if (adev->mman.buffer_funcs_ring == ring)  in sdma_v3_0_gfx_resume()
770 static int sdma_v3_0_ring_test_ring(struct amdgpu_ring *ring)  in sdma_v3_0_ring_test_ring()  argument
772 	struct amdgpu_device *adev = ring->adev;  in sdma_v3_0_ring_test_ring()
789 	r = amdgpu_ring_lock(ring, 5);  in sdma_v3_0_ring_test_ring()
791 		DRM_ERROR("amdgpu: dma failed to lock ring %d (%d).\n", ring->idx, r);  in sdma_v3_0_ring_test_ring()
796 	amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |  in sdma_v3_0_ring_test_ring()
798 	amdgpu_ring_write(ring, lower_32_bits(gpu_addr));  in sdma_v3_0_ring_test_ring()
799 	amdgpu_ring_write(ring, upper_32_bits(gpu_addr));  in sdma_v3_0_ring_test_ring()
800 	amdgpu_ring_write(ring, SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(1));  in sdma_v3_0_ring_test_ring()
801 	amdgpu_ring_write(ring, 0xDEADBEEF);  in sdma_v3_0_ring_test_ring()
802 	amdgpu_ring_unlock_commit(ring);  in sdma_v3_0_ring_test_ring()
812 		DRM_INFO("ring test on %d succeeded in %d usecs\n", ring->idx, i);  in sdma_v3_0_ring_test_ring()
815 			  ring->idx, tmp);  in sdma_v3_0_ring_test_ring()
831 static int sdma_v3_0_ring_test_ib(struct amdgpu_ring *ring)  in sdma_v3_0_ring_test_ib()  argument
833 	struct amdgpu_device *adev = ring->adev;  in sdma_v3_0_ring_test_ib()
852 	r = amdgpu_ib_get(ring, NULL, 256, &ib);  in sdma_v3_0_ring_test_ib()
869 	r = amdgpu_sched_ib_submit_kernel_helper(adev, ring, &ib, 1, NULL,  in sdma_v3_0_ring_test_ib()
888 			 ring->idx, i);  in sdma_v3_0_ring_test_ib()
969 				value = amdgpu_vm_map_gart(ib->ring->adev, addr);  in sdma_v3_0_vm_write_pte()
1040 	struct amdgpu_sdma_instance *sdma = amdgpu_get_sdma_instance(ib->ring);  in sdma_v3_0_vm_pad_ib()
1064 static void sdma_v3_0_ring_emit_vm_flush(struct amdgpu_ring *ring,  in sdma_v3_0_ring_emit_vm_flush()  argument
1067 	amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_SRBM_WRITE) |  in sdma_v3_0_ring_emit_vm_flush()
1070 		amdgpu_ring_write(ring, (mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR + vm_id));  in sdma_v3_0_ring_emit_vm_flush()
1072 		amdgpu_ring_write(ring, (mmVM_CONTEXT8_PAGE_TABLE_BASE_ADDR + vm_id - 8));  in sdma_v3_0_ring_emit_vm_flush()
1074 	amdgpu_ring_write(ring, pd_addr >> 12);  in sdma_v3_0_ring_emit_vm_flush()
1077 	amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_SRBM_WRITE) |  in sdma_v3_0_ring_emit_vm_flush()
1079 	amdgpu_ring_write(ring, mmVM_INVALIDATE_REQUEST);  in sdma_v3_0_ring_emit_vm_flush()
1080 	amdgpu_ring_write(ring, 1 << vm_id);  in sdma_v3_0_ring_emit_vm_flush()
1083 	amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_POLL_REGMEM) |  in sdma_v3_0_ring_emit_vm_flush()
1086 	amdgpu_ring_write(ring, mmVM_INVALIDATE_REQUEST << 2);  in sdma_v3_0_ring_emit_vm_flush()
1087 	amdgpu_ring_write(ring, 0);  in sdma_v3_0_ring_emit_vm_flush()
1088 	amdgpu_ring_write(ring, 0); /* reference */  in sdma_v3_0_ring_emit_vm_flush()
1089 	amdgpu_ring_write(ring, 0); /* mask */  in sdma_v3_0_ring_emit_vm_flush()
1090 	amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |  in sdma_v3_0_ring_emit_vm_flush()
1117 	struct amdgpu_ring *ring;  in sdma_v3_0_sw_init()  local
1143 		ring = &adev->sdma.instance[i].ring;  in sdma_v3_0_sw_init()
1144 		ring->ring_obj = NULL;  in sdma_v3_0_sw_init()
1145 		ring->use_doorbell = true;  in sdma_v3_0_sw_init()
1146 		ring->doorbell_index = (i == 0) ?  in sdma_v3_0_sw_init()
1149 		sprintf(ring->name, "sdma%d", i);  in sdma_v3_0_sw_init()
1150 		r = amdgpu_ring_init(adev, ring, 256 * 1024,  in sdma_v3_0_sw_init()
1169 		amdgpu_ring_fini(&adev->sdma.instance[i].ring);  in sdma_v3_0_sw_fini()
1394 			amdgpu_fence_process(&adev->sdma.instance[0].ring);  in sdma_v3_0_process_trap_irq()
1407 			amdgpu_fence_process(&adev->sdma.instance[1].ring);  in sdma_v3_0_process_trap_irq()
1479 		adev->sdma.instance[i].ring.funcs = &sdma_v3_0_ring_funcs;  in sdma_v3_0_set_ring_funcs()
1561 		adev->mman.buffer_funcs_ring = &adev->sdma.instance[0].ring;  in sdma_v3_0_set_buffer_funcs()
1576 		adev->vm_manager.vm_pte_funcs_ring = &adev->sdma.instance[0].ring;  in sdma_v3_0_set_vm_pte_funcs()