695 					       &pi->sys_info.vid_mapping_table,  in kv_convert_2bit_index_to_voltage()
820 			&pi->sys_info.sclk_voltage_mapping_table;  in kv_program_bootup_state()
1192 			&pi->sys_info.sclk_voltage_mapping_table;  in kv_calculate_dfs_bypass_settings()
1834 			&pi->sys_info.sclk_voltage_mapping_table;  in kv_set_valid_clock_range()
2065 	if (pi->sys_info.sclk_voltage_mapping_table.num_max_dpm_entries > 0) {  in kv_construct_max_power_limits_table()
2066 		int idx = pi->sys_info.sclk_voltage_mapping_table.num_max_dpm_entries - 1;  in kv_construct_max_power_limits_table()
2068 			pi->sys_info.sclk_voltage_mapping_table.entries[idx].sclk_frequency;  in kv_construct_max_power_limits_table()
2071 							 pi->sys_info.sclk_voltage_mapping_table.entries[idx].vid_2bit);  in kv_construct_max_power_limits_table()
2074 	table->mclk = pi->sys_info.nbp_memory_clock[0];  in kv_construct_max_power_limits_table()
2123 	pi->boot_pl.sclk = pi->sys_info.bootup_sclk;  in kv_construct_boot_state()
2124 	pi->boot_pl.vddc_index = pi->sys_info.bootup_nb_voltage_index;  in kv_construct_boot_state()
2215 			&pi->sys_info.sclk_voltage_mapping_table;  in kv_get_high_voltage_limit()
2297 			&pi->sys_info.sclk_voltage_mapping_table;  in kv_apply_state_adjust_rules()
2335 		if (pi->sys_info.nb_dpm_enable) {  in kv_apply_state_adjust_rules()
2336 			force_high = (mclk >= pi->sys_info.nbp_memory_clock[3]) ||  in kv_apply_state_adjust_rules()
2392 		if (!pi->sys_info.nb_dpm_enable)  in kv_calculate_nbps_level_settings()
2395 		force_high = ((mclk >= pi->sys_info.nbp_memory_clock[3]) ||  in kv_calculate_nbps_level_settings()
2417 		if (pi->sys_info.nb_dpm_enable && pi->battery_state) {  in kv_calculate_nbps_level_settings()
2460 							   &pi->sys_info.vid_mapping_table,  in kv_init_graphics_levels()
2469 			&pi->sys_info.sclk_voltage_mapping_table;  in kv_init_graphics_levels()
2533 	if (pi->sys_info.nb_dpm_enable) {  in kv_program_nbps_index_settings()
2604 		pi->sys_info.bootup_sclk = le32_to_cpu(igp_info->info_8.ulBootUpEngineClock);  in kv_parse_sys_info_table()
2605 		pi->sys_info.bootup_uma_clk = le32_to_cpu(igp_info->info_8.ulBootUpUMAClock);  in kv_parse_sys_info_table()
2606 		pi->sys_info.bootup_nb_voltage_index =  in kv_parse_sys_info_table()
2609 			pi->sys_info.htc_tmp_lmt = 203;  in kv_parse_sys_info_table()
2611 			pi->sys_info.htc_tmp_lmt = igp_info->info_8.ucHtcTmpLmt;  in kv_parse_sys_info_table()
2613 			pi->sys_info.htc_hyst_lmt = 5;  in kv_parse_sys_info_table()
2615 			pi->sys_info.htc_hyst_lmt = igp_info->info_8.ucHtcHystLmt;  in kv_parse_sys_info_table()
2616 		if (pi->sys_info.htc_tmp_lmt <= pi->sys_info.htc_hyst_lmt) {  in kv_parse_sys_info_table()
2621 			pi->sys_info.nb_dpm_enable = true;  in kv_parse_sys_info_table()
2623 			pi->sys_info.nb_dpm_enable = false;  in kv_parse_sys_info_table()
2626 			pi->sys_info.nbp_memory_clock[i] =  in kv_parse_sys_info_table()
2628 			pi->sys_info.nbp_n_clock[i] =  in kv_parse_sys_info_table()
2636 							  &pi->sys_info.sclk_voltage_mapping_table,  in kv_parse_sys_info_table()
2640 						 &pi->sys_info.vid_mapping_table,  in kv_parse_sys_info_table()
2963 	return pi->sys_info.bootup_uma_clk;  in kv_dpm_get_mclk()