377 	struct kv_ps *ps = rps->ps_priv;  in kv_get_ps()  local
379 	return ps;  in kv_get_ps()
2235 	struct kv_ps *ps = kv_get_ps(new_rps);  in kv_apply_state_adjust_rules()  local
2279 	ps->need_dfs_bypass = true;  in kv_apply_state_adjust_rules()
2281 	for (i = 0; i < ps->num_levels; i++) {  in kv_apply_state_adjust_rules()
2282 		if (ps->levels[i].sclk < sclk)  in kv_apply_state_adjust_rules()
2283 			ps->levels[i].sclk = sclk;  in kv_apply_state_adjust_rules()
2287 		for (i = 0; i < ps->num_levels; i++) {  in kv_apply_state_adjust_rules()
2290 			     kv_convert_8bit_index_to_voltage(adev, ps->levels[i].vddc_index))) {  in kv_apply_state_adjust_rules()
2292 				ps->levels[i].sclk = table->entries[limit].clk;  in kv_apply_state_adjust_rules()
2299 		for (i = 0; i < ps->num_levels; i++) {  in kv_apply_state_adjust_rules()
2302 			     kv_convert_8bit_index_to_voltage(adev, ps->levels[i].vddc_index))) {  in kv_apply_state_adjust_rules()
2304 				ps->levels[i].sclk = table->entries[limit].sclk_frequency;  in kv_apply_state_adjust_rules()
2310 		for (i = 0; i < ps->num_levels; i++) {  in kv_apply_state_adjust_rules()
2311 			ps->levels[i].sclk = stable_p_state_sclk;  in kv_apply_state_adjust_rules()
2325 		ps->dpm0_pg_nb_ps_lo = 0x1;  in kv_apply_state_adjust_rules()
2326 		ps->dpm0_pg_nb_ps_hi = 0x0;  in kv_apply_state_adjust_rules()
2327 		ps->dpmx_nb_ps_lo = 0x1;  in kv_apply_state_adjust_rules()
2328 		ps->dpmx_nb_ps_hi = 0x0;  in kv_apply_state_adjust_rules()
2330 		ps->dpm0_pg_nb_ps_lo = 0x3;  in kv_apply_state_adjust_rules()
2331 		ps->dpm0_pg_nb_ps_hi = 0x0;  in kv_apply_state_adjust_rules()
2332 		ps->dpmx_nb_ps_lo = 0x3;  in kv_apply_state_adjust_rules()
2333 		ps->dpmx_nb_ps_hi = 0x0;  in kv_apply_state_adjust_rules()
2339 			ps->dpm0_pg_nb_ps_lo = force_high ? 0x2 : 0x3;  in kv_apply_state_adjust_rules()
2340 			ps->dpm0_pg_nb_ps_hi = 0x2;  in kv_apply_state_adjust_rules()
2341 			ps->dpmx_nb_ps_lo = force_high ? 0x2 : 0x3;  in kv_apply_state_adjust_rules()
2342 			ps->dpmx_nb_ps_hi = 0x2;  in kv_apply_state_adjust_rules()
2671 				struct kv_ps *ps)  in kv_patch_boot_state()  argument
2675 	ps->num_levels = 1;  in kv_patch_boot_state()
2676 	ps->levels[0] = pi->boot_pl;  in kv_patch_boot_state()
2684 	struct kv_ps *ps = kv_get_ps(rps);  in kv_parse_pplib_non_clock_info()  local
2700 		kv_patch_boot_state(adev, ps);  in kv_parse_pplib_non_clock_info()
2711 	struct kv_ps *ps = kv_get_ps(rps);  in kv_parse_pplib_clock_info()  local
2712 	struct kv_pl *pl = &ps->levels[index];  in kv_parse_pplib_clock_info()
2720 	ps->num_levels = index + 1;  in kv_parse_pplib_clock_info()
2743 	struct kv_ps *ps;  in kv_parse_power_table()  local
2762 	adev->pm.dpm.ps = kzalloc(sizeof(struct amdgpu_ps) *  in kv_parse_power_table()
2764 	if (!adev->pm.dpm.ps)  in kv_parse_power_table()
2773 		ps = kzalloc(sizeof(struct kv_ps), GFP_KERNEL);  in kv_parse_power_table()
2774 		if (ps == NULL) {  in kv_parse_power_table()
2775 			kfree(adev->pm.dpm.ps);  in kv_parse_power_table()
2778 		adev->pm.dpm.ps[i].ps_priv = ps;  in kv_parse_power_table()
2791 						  &adev->pm.dpm.ps[i], k,  in kv_parse_power_table()
2795 		kv_parse_pplib_non_clock_info(adev, &adev->pm.dpm.ps[i],  in kv_parse_power_table()
2917 	struct kv_ps *ps = kv_get_ps(rps);  in kv_dpm_print_power_state()  local
2922 	for (i = 0; i < ps->num_levels; i++) {  in kv_dpm_print_power_state()
2923 		struct kv_pl *pl = &ps->levels[i];  in kv_dpm_print_power_state()
2936 		kfree(adev->pm.dpm.ps[i].ps_priv);  in kv_dpm_fini()
2938 	kfree(adev->pm.dpm.ps);  in kv_dpm_fini()