Lines Matching refs:entries

83 			return vddc_sclk_table->entries[vid_2bit].v;  in kv_convert_vid2_to_vid7()
85 return vddc_sclk_table->entries[vddc_sclk_table->count - 1].v; in kv_convert_vid2_to_vid7()
88 if (vid_mapping_table->entries[i].vid_2bit == vid_2bit) in kv_convert_vid2_to_vid7()
89 return vid_mapping_table->entries[i].vid_7bit; in kv_convert_vid2_to_vid7()
91 return vid_mapping_table->entries[vid_mapping_table->num_entries - 1].vid_7bit; in kv_convert_vid2_to_vid7()
105 if (vddc_sclk_table->entries[i].v == vid_7bit) in kv_convert_vid7_to_vid2()
111 if (vid_mapping_table->entries[i].vid_7bit == vid_7bit) in kv_convert_vid7_to_vid2()
112 return vid_mapping_table->entries[i].vid_2bit; in kv_convert_vid7_to_vid2()
115 return vid_mapping_table->entries[vid_mapping_table->num_entries - 1].vid_2bit; in kv_convert_vid7_to_vid2()
153 sclk_voltage_mapping_table->entries[n].sclk_frequency = in sumo_construct_sclk_voltage_mapping_table()
155 sclk_voltage_mapping_table->entries[n].vid_2bit = in sumo_construct_sclk_voltage_mapping_table()
173 vid_mapping_table->entries[table[i].usVoltageIndex].vid_7bit = in sumo_construct_vid_mapping_table()
175 vid_mapping_table->entries[table[i].usVoltageIndex].vid_2bit = in sumo_construct_vid_mapping_table()
181 if (vid_mapping_table->entries[i].vid_7bit == 0) { in sumo_construct_vid_mapping_table()
183 if (vid_mapping_table->entries[j].vid_7bit != 0) { in sumo_construct_vid_mapping_table()
184 vid_mapping_table->entries[i] = in sumo_construct_vid_mapping_table()
185 vid_mapping_table->entries[j]; in sumo_construct_vid_mapping_table()
186 vid_mapping_table->entries[j].vid_7bit = 0; in sumo_construct_vid_mapping_table()
812 if (table->entries[i].clk == pi->boot_pl.sclk) in kv_program_bootup_state()
826 if (table->entries[i].sclk_frequency == pi->boot_pl.sclk) in kv_program_bootup_state()
921 (pi->high_voltage_t < table->entries[i].v)) in kv_populate_uvd_table()
924 pi->uvd_level[i].VclkFrequency = cpu_to_be32(table->entries[i].vclk); in kv_populate_uvd_table()
925 pi->uvd_level[i].DclkFrequency = cpu_to_be32(table->entries[i].dclk); in kv_populate_uvd_table()
926 pi->uvd_level[i].MinVddNb = cpu_to_be16(table->entries[i].v); in kv_populate_uvd_table()
929 (u8)kv_get_clk_bypass(adev, table->entries[i].vclk); in kv_populate_uvd_table()
931 (u8)kv_get_clk_bypass(adev, table->entries[i].dclk); in kv_populate_uvd_table()
934 table->entries[i].vclk, false, &dividers); in kv_populate_uvd_table()
940 table->entries[i].dclk, false, &dividers); in kv_populate_uvd_table()
992 pi->high_voltage_t < table->entries[i].v) in kv_populate_vce_table()
995 pi->vce_level[i].Frequency = cpu_to_be32(table->entries[i].evclk); in kv_populate_vce_table()
996 pi->vce_level[i].MinVoltage = cpu_to_be16(table->entries[i].v); in kv_populate_vce_table()
999 (u8)kv_get_clk_bypass(adev, table->entries[i].evclk); in kv_populate_vce_table()
1002 table->entries[i].evclk, false, &dividers); in kv_populate_vce_table()
1055 pi->high_voltage_t < table->entries[i].v) in kv_populate_samu_table()
1058 pi->samu_level[i].Frequency = cpu_to_be32(table->entries[i].clk); in kv_populate_samu_table()
1059 pi->samu_level[i].MinVoltage = cpu_to_be16(table->entries[i].v); in kv_populate_samu_table()
1062 (u8)kv_get_clk_bypass(adev, table->entries[i].clk); in kv_populate_samu_table()
1065 table->entries[i].clk, false, &dividers); in kv_populate_samu_table()
1120 pi->acp_level[i].Frequency = cpu_to_be32(table->entries[i].clk); in kv_populate_acp_table()
1121 pi->acp_level[i].MinVoltage = cpu_to_be16(table->entries[i].v); in kv_populate_acp_table()
1124 table->entries[i].clk, false, &dividers); in kv_populate_acp_table()
1174 if (kv_get_clock_difference(table->entries[i].clk, 40000) < 200) in kv_calculate_dfs_bypass_settings()
1176 else if (kv_get_clock_difference(table->entries[i].clk, 30000) < 200) in kv_calculate_dfs_bypass_settings()
1178 else if (kv_get_clock_difference(table->entries[i].clk, 26600) < 200) in kv_calculate_dfs_bypass_settings()
1180 else if (kv_get_clock_difference(table->entries[i].clk , 20000) < 200) in kv_calculate_dfs_bypass_settings()
1182 else if (kv_get_clock_difference(table->entries[i].clk , 10000) < 200) in kv_calculate_dfs_bypass_settings()
1195 if (kv_get_clock_difference(table->entries[i].sclk_frequency, 40000) < 200) in kv_calculate_dfs_bypass_settings()
1197 else if (kv_get_clock_difference(table->entries[i].sclk_frequency, 30000) < 200) in kv_calculate_dfs_bypass_settings()
1199 else if (kv_get_clock_difference(table->entries[i].sclk_frequency, 26600) < 200) in kv_calculate_dfs_bypass_settings()
1201 else if (kv_get_clock_difference(table->entries[i].sclk_frequency, 20000) < 200) in kv_calculate_dfs_bypass_settings()
1203 else if (kv_get_clock_difference(table->entries[i].sclk_frequency, 10000) < 200) in kv_calculate_dfs_bypass_settings()
1536 if (table->entries[i].evclk >= evclk) in kv_get_vce_boot_level()
1630 if (table->entries[i].clk >= 0) /* XXX */ in kv_get_acp_boot_level()
1812 if ((table->entries[i].clk >= new_ps->levels[0].sclk) || in kv_set_valid_clock_range()
1820 if (table->entries[i].clk <= new_ps->levels[new_ps->num_levels - 1].sclk) in kv_set_valid_clock_range()
1826 if ((new_ps->levels[0].sclk - table->entries[pi->highest_valid].clk) > in kv_set_valid_clock_range()
1827 (table->entries[pi->lowest_valid].clk - new_ps->levels[new_ps->num_levels - 1].sclk)) in kv_set_valid_clock_range()
1837 if (table->entries[i].sclk_frequency >= new_ps->levels[0].sclk || in kv_set_valid_clock_range()
1845 if (table->entries[i].sclk_frequency <= in kv_set_valid_clock_range()
1853 table->entries[pi->highest_valid].sclk_frequency) > in kv_set_valid_clock_range()
1854 (table->entries[pi->lowest_valid].sclk_frequency - in kv_set_valid_clock_range()
2068 pi->sys_info.sclk_voltage_mapping_table.entries[idx].sclk_frequency; in kv_construct_max_power_limits_table()
2071 pi->sys_info.sclk_voltage_mapping_table.entries[idx].vid_2bit); in kv_construct_max_power_limits_table()
2091 uvd_table->entries[i].v = in kv_patch_voltage_values()
2093 uvd_table->entries[i].v); in kv_patch_voltage_values()
2098 vce_table->entries[i].v = in kv_patch_voltage_values()
2100 vce_table->entries[i].v); in kv_patch_voltage_values()
2105 samu_table->entries[i].v = in kv_patch_voltage_values()
2107 samu_table->entries[i].v); in kv_patch_voltage_values()
2112 acp_table->entries[i].v = in kv_patch_voltage_values()
2114 acp_table->entries[i].v); in kv_patch_voltage_values()
2207 (kv_convert_8bit_index_to_voltage(adev, table->entries[i].v) <= in kv_get_high_voltage_limit()
2219 (kv_convert_2bit_index_to_voltage(adev, table->entries[i].vid_2bit) <= in kv_get_high_voltage_limit()
2262 if (stable_p_state_sclk >= table->entries[i].clk) { in kv_apply_state_adjust_rules()
2263 stable_p_state_sclk = table->entries[i].clk; in kv_apply_state_adjust_rules()
2269 stable_p_state_sclk = table->entries[0].clk; in kv_apply_state_adjust_rules()
2292 ps->levels[i].sclk = table->entries[limit].clk; in kv_apply_state_adjust_rules()
2304 ps->levels[i].sclk = table->entries[limit].sclk_frequency; in kv_apply_state_adjust_rules()
2455 kv_convert_8bit_index_to_voltage(adev, table->entries[i].v))) in kv_init_graphics_levels()
2458 kv_set_divider_value(adev, i, table->entries[i].clk); in kv_init_graphics_levels()
2461 table->entries[i].v); in kv_init_graphics_levels()
2475 kv_convert_2bit_index_to_voltage(adev, table->entries[i].vid_2bit)) in kv_init_graphics_levels()
2478 kv_set_divider_value(adev, i, table->entries[i].sclk_frequency); in kv_init_graphics_levels()
2479 kv_set_vid(adev, i, table->entries[i].vid_2bit); in kv_init_graphics_levels()