133 	u32 tmp;  in gmc_v8_0_mc_wait_for_idle()  local
137 		tmp = RREG32(mmSRBM_STATUS) & (SRBM_STATUS__VMC_BUSY_MASK |  in gmc_v8_0_mc_wait_for_idle()
143 		if (!tmp)  in gmc_v8_0_mc_wait_for_idle()
176 	u32 tmp;  in gmc_v8_0_mc_resume()  local
179 	tmp = RREG32(mmMC_SHARED_BLACKOUT_CNTL);  in gmc_v8_0_mc_resume()
180 	tmp = REG_SET_FIELD(tmp, MC_SHARED_BLACKOUT_CNTL, BLACKOUT_MODE, 0);  in gmc_v8_0_mc_resume()
181 	WREG32(mmMC_SHARED_BLACKOUT_CNTL, tmp);  in gmc_v8_0_mc_resume()
183 	tmp = REG_SET_FIELD(0, BIF_FB_EN, FB_READ_EN, 1);  in gmc_v8_0_mc_resume()
184 	tmp = REG_SET_FIELD(tmp, BIF_FB_EN, FB_WRITE_EN, 1);  in gmc_v8_0_mc_resume()
185 	WREG32(mmBIF_FB_EN, tmp);  in gmc_v8_0_mc_resume()
338 	u32 tmp;  in gmc_v8_0_mc_program()  local
365 	tmp = ((adev->mc.vram_end >> 24) & 0xFFFF) << 16;  in gmc_v8_0_mc_program()
366 	tmp |= ((adev->mc.vram_start >> 24) & 0xFFFF);  in gmc_v8_0_mc_program()
367 	WREG32(mmMC_VM_FB_LOCATION, tmp);  in gmc_v8_0_mc_program()
382 	tmp = RREG32(mmHDP_MISC_CNTL);  in gmc_v8_0_mc_program()
383 	tmp = REG_SET_FIELD(tmp, HDP_MISC_CNTL, FLUSH_INVALIDATE_CACHE, 1);  in gmc_v8_0_mc_program()
384 	WREG32(mmHDP_MISC_CNTL, tmp);  in gmc_v8_0_mc_program()
386 	tmp = RREG32(mmHDP_HOST_PATH_CNTL);  in gmc_v8_0_mc_program()
387 	WREG32(mmHDP_HOST_PATH_CNTL, tmp);  in gmc_v8_0_mc_program()
401 	u32 tmp;  in gmc_v8_0_mc_init()  local
405 	tmp = RREG32(mmMC_ARB_RAMCFG);  in gmc_v8_0_mc_init()
406 	if (REG_GET_FIELD(tmp, MC_ARB_RAMCFG, CHANSIZE)) {  in gmc_v8_0_mc_init()
411 	tmp = RREG32(mmMC_SHARED_CHMAP);  in gmc_v8_0_mc_init()
412 	switch (REG_GET_FIELD(tmp, MC_SHARED_CHMAP, NOOFCHAN)) {  in gmc_v8_0_mc_init()
545 	u32 tmp;  in gmc_v8_0_set_fault_enable_default()  local
547 	tmp = RREG32(mmVM_CONTEXT1_CNTL);  in gmc_v8_0_set_fault_enable_default()
548 	tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL,  in gmc_v8_0_set_fault_enable_default()
550 	tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL,  in gmc_v8_0_set_fault_enable_default()
552 	tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL,  in gmc_v8_0_set_fault_enable_default()
554 	tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL,  in gmc_v8_0_set_fault_enable_default()
556 	tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL,  in gmc_v8_0_set_fault_enable_default()
558 	tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL,  in gmc_v8_0_set_fault_enable_default()
560 	tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL,  in gmc_v8_0_set_fault_enable_default()
562 	WREG32(mmVM_CONTEXT1_CNTL, tmp);  in gmc_v8_0_set_fault_enable_default()
579 	u32 tmp;  in gmc_v8_0_gart_enable()  local
589 	tmp = RREG32(mmMC_VM_MX_L1_TLB_CNTL);  in gmc_v8_0_gart_enable()
590 	tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ENABLE_L1_TLB, 1);  in gmc_v8_0_gart_enable()
591 	tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ENABLE_L1_FRAGMENT_PROCESSING, 1);  in gmc_v8_0_gart_enable()
592 	tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, SYSTEM_ACCESS_MODE, 3);  in gmc_v8_0_gart_enable()
593 	tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ENABLE_ADVANCED_DRIVER_MODEL, 1);  in gmc_v8_0_gart_enable()
594 	tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, SYSTEM_APERTURE_UNMAPPED_ACCESS, 0);  in gmc_v8_0_gart_enable()
595 	WREG32(mmMC_VM_MX_L1_TLB_CNTL, tmp);  in gmc_v8_0_gart_enable()
597 	tmp = RREG32(mmVM_L2_CNTL);  in gmc_v8_0_gart_enable()
598 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE, 1);  in gmc_v8_0_gart_enable()
599 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 1);  in gmc_v8_0_gart_enable()
600 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE, 1);  in gmc_v8_0_gart_enable()
601 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE, 1);  in gmc_v8_0_gart_enable()
602 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, EFFECTIVE_L2_QUEUE_SIZE, 7);  in gmc_v8_0_gart_enable()
603 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, CONTEXT1_IDENTITY_ACCESS_MODE, 1);  in gmc_v8_0_gart_enable()
604 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_DEFAULT_PAGE_OUT_TO_SYSTEM_MEMORY, 1);  in gmc_v8_0_gart_enable()
605 	WREG32(mmVM_L2_CNTL, tmp);  in gmc_v8_0_gart_enable()
606 	tmp = RREG32(mmVM_L2_CNTL2);  in gmc_v8_0_gart_enable()
607 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1);  in gmc_v8_0_gart_enable()
608 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_L2_CACHE, 1);  in gmc_v8_0_gart_enable()
609 	WREG32(mmVM_L2_CNTL2, tmp);  in gmc_v8_0_gart_enable()
610 	tmp = RREG32(mmVM_L2_CNTL3);  in gmc_v8_0_gart_enable()
611 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, L2_CACHE_BIGK_ASSOCIATIVITY, 1);  in gmc_v8_0_gart_enable()
612 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 4);  in gmc_v8_0_gart_enable()
613 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, L2_CACHE_BIGK_FRAGMENT_SIZE, 4);  in gmc_v8_0_gart_enable()
614 	WREG32(mmVM_L2_CNTL3, tmp);  in gmc_v8_0_gart_enable()
616 	tmp = RREG32(mmVM_L2_CNTL4);  in gmc_v8_0_gart_enable()
617 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, VMC_TAP_CONTEXT0_PDE_REQUEST_PHYSICAL, 0);  in gmc_v8_0_gart_enable()
618 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, VMC_TAP_CONTEXT0_PDE_REQUEST_SHARED, 0);  in gmc_v8_0_gart_enable()
619 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, VMC_TAP_CONTEXT0_PDE_REQUEST_SNOOP, 0);  in gmc_v8_0_gart_enable()
620 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, VMC_TAP_CONTEXT0_PTE_REQUEST_PHYSICAL, 0);  in gmc_v8_0_gart_enable()
621 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, VMC_TAP_CONTEXT0_PTE_REQUEST_SHARED, 0);  in gmc_v8_0_gart_enable()
622 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, VMC_TAP_CONTEXT0_PTE_REQUEST_SNOOP, 0);  in gmc_v8_0_gart_enable()
623 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, VMC_TAP_CONTEXT1_PDE_REQUEST_PHYSICAL, 0);  in gmc_v8_0_gart_enable()
624 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, VMC_TAP_CONTEXT1_PDE_REQUEST_SHARED, 0);  in gmc_v8_0_gart_enable()
625 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, VMC_TAP_CONTEXT1_PDE_REQUEST_SNOOP, 0);  in gmc_v8_0_gart_enable()
626 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, VMC_TAP_CONTEXT1_PTE_REQUEST_PHYSICAL, 0);  in gmc_v8_0_gart_enable()
627 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, VMC_TAP_CONTEXT1_PTE_REQUEST_SHARED, 0);  in gmc_v8_0_gart_enable()
628 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, VMC_TAP_CONTEXT1_PTE_REQUEST_SNOOP, 0);  in gmc_v8_0_gart_enable()
629 	WREG32(mmVM_L2_CNTL4, tmp);  in gmc_v8_0_gart_enable()
637 	tmp = RREG32(mmVM_CONTEXT0_CNTL);  in gmc_v8_0_gart_enable()
638 	tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1);  in gmc_v8_0_gart_enable()
639 	tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, PAGE_TABLE_DEPTH, 0);  in gmc_v8_0_gart_enable()
640 	tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, RANGE_PROTECTION_FAULT_ENABLE_DEFAULT, 1);  in gmc_v8_0_gart_enable()
641 	WREG32(mmVM_CONTEXT0_CNTL, tmp);  in gmc_v8_0_gart_enable()
667 	tmp = RREG32(mmVM_CONTEXT1_CNTL);  in gmc_v8_0_gart_enable()
668 	tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1);  in gmc_v8_0_gart_enable()
669 	tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, PAGE_TABLE_DEPTH, 1);  in gmc_v8_0_gart_enable()
670 	tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, RANGE_PROTECTION_FAULT_ENABLE_DEFAULT, 1);  in gmc_v8_0_gart_enable()
671 	tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, DUMMY_PAGE_PROTECTION_FAULT_ENABLE_DEFAULT, 1);  in gmc_v8_0_gart_enable()
672 	tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, PDE0_PROTECTION_FAULT_ENABLE_DEFAULT, 1);  in gmc_v8_0_gart_enable()
673 	tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VALID_PROTECTION_FAULT_ENABLE_DEFAULT, 1);  in gmc_v8_0_gart_enable()
674 	tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, READ_PROTECTION_FAULT_ENABLE_DEFAULT, 1);  in gmc_v8_0_gart_enable()
675 	tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, WRITE_PROTECTION_FAULT_ENABLE_DEFAULT, 1);  in gmc_v8_0_gart_enable()
676 	tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, EXECUTE_PROTECTION_FAULT_ENABLE_DEFAULT, 1);  in gmc_v8_0_gart_enable()
677 	tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, PAGE_TABLE_BLOCK_SIZE,  in gmc_v8_0_gart_enable()
679 	WREG32(mmVM_CONTEXT1_CNTL, tmp);  in gmc_v8_0_gart_enable()
718 	u32 tmp;  in gmc_v8_0_gart_disable()  local
724 	tmp = RREG32(mmMC_VM_MX_L1_TLB_CNTL);  in gmc_v8_0_gart_disable()
725 	tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ENABLE_L1_TLB, 0);  in gmc_v8_0_gart_disable()
726 	tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ENABLE_L1_FRAGMENT_PROCESSING, 0);  in gmc_v8_0_gart_disable()
727 	tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ENABLE_ADVANCED_DRIVER_MODEL, 0);  in gmc_v8_0_gart_disable()
728 	WREG32(mmMC_VM_MX_L1_TLB_CNTL, tmp);  in gmc_v8_0_gart_disable()
730 	tmp = RREG32(mmVM_L2_CNTL);  in gmc_v8_0_gart_disable()
731 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE, 0);  in gmc_v8_0_gart_disable()
732 	WREG32(mmVM_L2_CNTL, tmp);  in gmc_v8_0_gart_disable()
777 		u64 tmp = RREG32(mmMC_VM_FB_OFFSET);  in gmc_v8_0_vm_init()  local
778 		tmp <<= 22;  in gmc_v8_0_vm_init()
779 		adev->vm_manager.vram_base_offset = tmp;  in gmc_v8_0_vm_init()
880 		u32 tmp;  in gmc_v8_0_sw_init()  local
883 			tmp = RREG32(mmMC_SEQ_MISC0_FIJI);  in gmc_v8_0_sw_init()
885 			tmp = RREG32(mmMC_SEQ_MISC0);  in gmc_v8_0_sw_init()
886 		tmp &= MC_SEQ_MISC0__MT__MASK;  in gmc_v8_0_sw_init()
887 		adev->mc.vram_type = gmc_v8_0_convert_vram_type(tmp);  in gmc_v8_0_sw_init()
1048 	u32 tmp = RREG32(mmSRBM_STATUS);  in gmc_v8_0_is_idle()  local
1050 	if (tmp & (SRBM_STATUS__MCB_BUSY_MASK | SRBM_STATUS__MCB_NON_DISPLAY_BUSY_MASK |  in gmc_v8_0_is_idle()
1060 	u32 tmp;  in gmc_v8_0_wait_for_idle()  local
1065 		tmp = RREG32(mmSRBM_STATUS) & (SRBM_STATUS__MCB_BUSY_MASK |  in gmc_v8_0_wait_for_idle()
1071 		if (!tmp)  in gmc_v8_0_wait_for_idle()
1189 	u32 tmp = RREG32(mmSRBM_STATUS);  in gmc_v8_0_soft_reset()  local
1191 	if (tmp & SRBM_STATUS__VMC_BUSY_MASK)  in gmc_v8_0_soft_reset()
1195 	if (tmp & (SRBM_STATUS__MCB_BUSY_MASK | SRBM_STATUS__MCB_NON_DISPLAY_BUSY_MASK |  in gmc_v8_0_soft_reset()
1211 		tmp = RREG32(mmSRBM_SOFT_RESET);  in gmc_v8_0_soft_reset()
1212 		tmp |= srbm_soft_reset;  in gmc_v8_0_soft_reset()
1213 		dev_info(adev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp);  in gmc_v8_0_soft_reset()
1214 		WREG32(mmSRBM_SOFT_RESET, tmp);  in gmc_v8_0_soft_reset()
1215 		tmp = RREG32(mmSRBM_SOFT_RESET);  in gmc_v8_0_soft_reset()
1219 		tmp &= ~srbm_soft_reset;  in gmc_v8_0_soft_reset()
1220 		WREG32(mmSRBM_SOFT_RESET, tmp);  in gmc_v8_0_soft_reset()
1221 		tmp = RREG32(mmSRBM_SOFT_RESET);  in gmc_v8_0_soft_reset()
1240 	u32 tmp;  in gmc_v8_0_vm_fault_interrupt_state()  local
1252 		tmp = RREG32(mmVM_CONTEXT0_CNTL);  in gmc_v8_0_vm_fault_interrupt_state()
1253 		tmp &= ~bits;  in gmc_v8_0_vm_fault_interrupt_state()
1254 		WREG32(mmVM_CONTEXT0_CNTL, tmp);  in gmc_v8_0_vm_fault_interrupt_state()
1256 		tmp = RREG32(mmVM_CONTEXT1_CNTL);  in gmc_v8_0_vm_fault_interrupt_state()
1257 		tmp &= ~bits;  in gmc_v8_0_vm_fault_interrupt_state()
1258 		WREG32(mmVM_CONTEXT1_CNTL, tmp);  in gmc_v8_0_vm_fault_interrupt_state()
1262 		tmp = RREG32(mmVM_CONTEXT0_CNTL);  in gmc_v8_0_vm_fault_interrupt_state()
1263 		tmp |= bits;  in gmc_v8_0_vm_fault_interrupt_state()
1264 		WREG32(mmVM_CONTEXT0_CNTL, tmp);  in gmc_v8_0_vm_fault_interrupt_state()
1266 		tmp = RREG32(mmVM_CONTEXT1_CNTL);  in gmc_v8_0_vm_fault_interrupt_state()
1267 		tmp |= bits;  in gmc_v8_0_vm_fault_interrupt_state()
1268 		WREG32(mmVM_CONTEXT1_CNTL, tmp);  in gmc_v8_0_vm_fault_interrupt_state()