137 		tmp = RREG32(mmSRBM_STATUS) & (SRBM_STATUS__VMC_BUSY_MASK |  in gmc_v8_0_mc_wait_for_idle()
160 	blackout = RREG32(mmMC_SHARED_BLACKOUT_CNTL);  in gmc_v8_0_mc_stop()
179 	tmp = RREG32(mmMC_SHARED_BLACKOUT_CNTL);  in gmc_v8_0_mc_resume()
266 	running = REG_GET_FIELD(RREG32(mmMC_SEQ_SUP_CNTL), MC_SEQ_SUP_CNTL, RUN);  in gmc_v8_0_mc_load_microcode()
270 			blackout = RREG32(mmMC_SHARED_BLACKOUT_CNTL);  in gmc_v8_0_mc_load_microcode()
294 			if (REG_GET_FIELD(RREG32(mmMC_SEQ_TRAIN_WAKEUP_CNTL),  in gmc_v8_0_mc_load_microcode()
300 			if (REG_GET_FIELD(RREG32(mmMC_SEQ_TRAIN_WAKEUP_CNTL),  in gmc_v8_0_mc_load_microcode()
382 	tmp = RREG32(mmHDP_MISC_CNTL);  in gmc_v8_0_mc_program()
386 	tmp = RREG32(mmHDP_HOST_PATH_CNTL);  in gmc_v8_0_mc_program()
405 	tmp = RREG32(mmMC_ARB_RAMCFG);  in gmc_v8_0_mc_init()
411 	tmp = RREG32(mmMC_SHARED_CHMAP);  in gmc_v8_0_mc_init()
447 	adev->mc.mc_vram_size = RREG32(mmCONFIG_MEMSIZE) * 1024ULL * 1024ULL;  in gmc_v8_0_mc_init()
448 	adev->mc.real_vram_size = RREG32(mmCONFIG_MEMSIZE) * 1024ULL * 1024ULL;  in gmc_v8_0_mc_init()
547 	tmp = RREG32(mmVM_CONTEXT1_CNTL);  in gmc_v8_0_set_fault_enable_default()
589 	tmp = RREG32(mmMC_VM_MX_L1_TLB_CNTL);  in gmc_v8_0_gart_enable()
597 	tmp = RREG32(mmVM_L2_CNTL);  in gmc_v8_0_gart_enable()
606 	tmp = RREG32(mmVM_L2_CNTL2);  in gmc_v8_0_gart_enable()
610 	tmp = RREG32(mmVM_L2_CNTL3);  in gmc_v8_0_gart_enable()
616 	tmp = RREG32(mmVM_L2_CNTL4);  in gmc_v8_0_gart_enable()
637 	tmp = RREG32(mmVM_CONTEXT0_CNTL);  in gmc_v8_0_gart_enable()
667 	tmp = RREG32(mmVM_CONTEXT1_CNTL);  in gmc_v8_0_gart_enable()
724 	tmp = RREG32(mmMC_VM_MX_L1_TLB_CNTL);  in gmc_v8_0_gart_disable()
730 	tmp = RREG32(mmVM_L2_CNTL);  in gmc_v8_0_gart_disable()
777 		u64 tmp = RREG32(mmMC_VM_FB_OFFSET);  in gmc_v8_0_vm_init()
883 			tmp = RREG32(mmMC_SEQ_MISC0_FIJI);  in gmc_v8_0_sw_init()
885 			tmp = RREG32(mmMC_SEQ_MISC0);  in gmc_v8_0_sw_init()
1048 	u32 tmp = RREG32(mmSRBM_STATUS);  in gmc_v8_0_is_idle()
1065 		tmp = RREG32(mmSRBM_STATUS) & (SRBM_STATUS__MCB_BUSY_MASK |  in gmc_v8_0_wait_for_idle()
1086 		RREG32(mmSRBM_STATUS));  in gmc_v8_0_print_status()
1088 		RREG32(mmSRBM_STATUS2));  in gmc_v8_0_print_status()
1091 		 RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_ADDR));  in gmc_v8_0_print_status()
1093 		 RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_STATUS));  in gmc_v8_0_print_status()
1095 		 RREG32(mmMC_VM_MX_L1_TLB_CNTL));  in gmc_v8_0_print_status()
1097 		 RREG32(mmVM_L2_CNTL));  in gmc_v8_0_print_status()
1099 		 RREG32(mmVM_L2_CNTL2));  in gmc_v8_0_print_status()
1101 		 RREG32(mmVM_L2_CNTL3));  in gmc_v8_0_print_status()
1103 		 RREG32(mmVM_L2_CNTL4));  in gmc_v8_0_print_status()
1105 		 RREG32(mmVM_CONTEXT0_PAGE_TABLE_START_ADDR));  in gmc_v8_0_print_status()
1107 		 RREG32(mmVM_CONTEXT0_PAGE_TABLE_END_ADDR));  in gmc_v8_0_print_status()
1109 		 RREG32(mmVM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR));  in gmc_v8_0_print_status()
1111 		 RREG32(mmVM_CONTEXT0_CNTL2));  in gmc_v8_0_print_status()
1113 		 RREG32(mmVM_CONTEXT0_CNTL));  in gmc_v8_0_print_status()
1115 		 RREG32(mmVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR));  in gmc_v8_0_print_status()
1117 		 RREG32(mmVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR));  in gmc_v8_0_print_status()
1119 		 RREG32(mmVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET));  in gmc_v8_0_print_status()
1121 		 RREG32(mmVM_CONTEXT1_PAGE_TABLE_START_ADDR));  in gmc_v8_0_print_status()
1123 		 RREG32(mmVM_CONTEXT1_PAGE_TABLE_END_ADDR));  in gmc_v8_0_print_status()
1125 		 RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR));  in gmc_v8_0_print_status()
1127 		 RREG32(mmVM_CONTEXT1_CNTL2));  in gmc_v8_0_print_status()
1129 		 RREG32(mmVM_CONTEXT1_CNTL));  in gmc_v8_0_print_status()
1133 				 i, RREG32(mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR + i));  in gmc_v8_0_print_status()
1136 				 i, RREG32(mmVM_CONTEXT8_PAGE_TABLE_BASE_ADDR + i - 8));  in gmc_v8_0_print_status()
1139 		 RREG32(mmMC_VM_SYSTEM_APERTURE_LOW_ADDR));  in gmc_v8_0_print_status()
1141 		 RREG32(mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR));  in gmc_v8_0_print_status()
1143 		 RREG32(mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR));  in gmc_v8_0_print_status()
1145 		 RREG32(mmMC_VM_FB_LOCATION));  in gmc_v8_0_print_status()
1147 		 RREG32(mmMC_VM_AGP_BASE));  in gmc_v8_0_print_status()
1149 		 RREG32(mmMC_VM_AGP_TOP));  in gmc_v8_0_print_status()
1151 		 RREG32(mmMC_VM_AGP_BOT));  in gmc_v8_0_print_status()
1154 		 RREG32(mmHDP_REG_COHERENCY_FLUSH_CNTL));  in gmc_v8_0_print_status()
1156 		 RREG32(mmHDP_NONSURFACE_BASE));  in gmc_v8_0_print_status()
1158 		 RREG32(mmHDP_NONSURFACE_INFO));  in gmc_v8_0_print_status()
1160 		 RREG32(mmHDP_NONSURFACE_SIZE));  in gmc_v8_0_print_status()
1162 		 RREG32(mmHDP_MISC_CNTL));  in gmc_v8_0_print_status()
1164 		 RREG32(mmHDP_HOST_PATH_CNTL));  in gmc_v8_0_print_status()
1169 			 0xb05 + j, RREG32(0xb05 + j));  in gmc_v8_0_print_status()
1171 			 0xb06 + j, RREG32(0xb06 + j));  in gmc_v8_0_print_status()
1173 			 0xb07 + j, RREG32(0xb07 + j));  in gmc_v8_0_print_status()
1175 			 0xb08 + j, RREG32(0xb08 + j));  in gmc_v8_0_print_status()
1177 			 0xb09 + j, RREG32(0xb09 + j));  in gmc_v8_0_print_status()
1181 		 RREG32(mmBIF_FB_EN));  in gmc_v8_0_print_status()
1189 	u32 tmp = RREG32(mmSRBM_STATUS);  in gmc_v8_0_soft_reset()
1211 		tmp = RREG32(mmSRBM_SOFT_RESET);  in gmc_v8_0_soft_reset()
1215 		tmp = RREG32(mmSRBM_SOFT_RESET);  in gmc_v8_0_soft_reset()
1221 		tmp = RREG32(mmSRBM_SOFT_RESET);  in gmc_v8_0_soft_reset()
1252 		tmp = RREG32(mmVM_CONTEXT0_CNTL);  in gmc_v8_0_vm_fault_interrupt_state()
1256 		tmp = RREG32(mmVM_CONTEXT1_CNTL);  in gmc_v8_0_vm_fault_interrupt_state()
1262 		tmp = RREG32(mmVM_CONTEXT0_CNTL);  in gmc_v8_0_vm_fault_interrupt_state()
1266 		tmp = RREG32(mmVM_CONTEXT1_CNTL);  in gmc_v8_0_vm_fault_interrupt_state()
1283 	addr = RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_ADDR);  in gmc_v8_0_process_interrupt()
1284 	status = RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_STATUS);  in gmc_v8_0_process_interrupt()
1285 	mc_client = RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_MCCLIENT);  in gmc_v8_0_process_interrupt()