92 		tmp = RREG32(mmSRBM_STATUS) & 0x1F00;  in gmc_v7_0_mc_wait_for_idle()
110 	blackout = RREG32(mmMC_SHARED_BLACKOUT_CNTL);  in gmc_v7_0_mc_stop()
129 	tmp = RREG32(mmMC_SHARED_BLACKOUT_CNTL);  in gmc_v7_0_mc_resume()
225 	running = REG_GET_FIELD(RREG32(mmMC_SEQ_SUP_CNTL), MC_SEQ_SUP_CNTL, RUN);  in gmc_v7_0_mc_load_microcode()
229 			blackout = RREG32(mmMC_SHARED_BLACKOUT_CNTL);  in gmc_v7_0_mc_load_microcode()
253 			if (REG_GET_FIELD(RREG32(mmMC_SEQ_TRAIN_WAKEUP_CNTL),  in gmc_v7_0_mc_load_microcode()
259 			if (REG_GET_FIELD(RREG32(mmMC_SEQ_TRAIN_WAKEUP_CNTL),  in gmc_v7_0_mc_load_microcode()
341 	tmp = RREG32(mmHDP_MISC_CNTL);  in gmc_v7_0_mc_program()
345 	tmp = RREG32(mmHDP_HOST_PATH_CNTL);  in gmc_v7_0_mc_program()
364 	tmp = RREG32(mmMC_ARB_RAMCFG);  in gmc_v7_0_mc_init()
370 	tmp = RREG32(mmMC_SHARED_CHMAP);  in gmc_v7_0_mc_init()
406 	adev->mc.mc_vram_size = RREG32(mmCONFIG_MEMSIZE) * 1024ULL * 1024ULL;  in gmc_v7_0_mc_init()
407 	adev->mc.real_vram_size = RREG32(mmCONFIG_MEMSIZE) * 1024ULL * 1024ULL;  in gmc_v7_0_mc_init()
486 	tmp = RREG32(mmVM_CONTEXT1_CNTL);  in gmc_v7_0_set_fault_enable_default()
526 	tmp = RREG32(mmMC_VM_MX_L1_TLB_CNTL);  in gmc_v7_0_gart_enable()
534 	tmp = RREG32(mmVM_L2_CNTL);  in gmc_v7_0_gart_enable()
546 	tmp = RREG32(mmVM_L2_CNTL3);  in gmc_v7_0_gart_enable()
558 	tmp = RREG32(mmVM_CONTEXT0_CNTL);  in gmc_v7_0_gart_enable()
588 	tmp = RREG32(mmVM_CONTEXT1_CNTL);  in gmc_v7_0_gart_enable()
600 		tmp = RREG32(mmCHUB_CONTROL);  in gmc_v7_0_gart_enable()
644 	tmp = RREG32(mmMC_VM_MX_L1_TLB_CNTL);  in gmc_v7_0_gart_disable()
650 	tmp = RREG32(mmVM_L2_CNTL);  in gmc_v7_0_gart_disable()
697 		u64 tmp = RREG32(mmMC_VM_FB_OFFSET);  in gmc_v7_0_vm_init()
790 		orig = data = RREG32(mc_cg_registers[i]);  in gmc_v7_0_enable_mc_ls()
807 		orig = data = RREG32(mc_cg_registers[i]);  in gmc_v7_0_enable_mc_mgcg()
845 	orig = data = RREG32(mmHDP_HOST_PATH_CNTL);  in gmc_v7_0_enable_hdp_mgcg()
861 	orig = data = RREG32(mmHDP_MEM_POWER_LS);  in gmc_v7_0_enable_hdp_ls()
924 		u32 tmp = RREG32(mmMC_SEQ_MISC0);  in gmc_v7_0_sw_init()
1087 	u32 tmp = RREG32(mmSRBM_STATUS);  in gmc_v7_0_is_idle()
1104 		tmp = RREG32(mmSRBM_STATUS) & (SRBM_STATUS__MCB_BUSY_MASK |  in gmc_v7_0_wait_for_idle()
1124 		RREG32(mmSRBM_STATUS));  in gmc_v7_0_print_status()
1126 		RREG32(mmSRBM_STATUS2));  in gmc_v7_0_print_status()
1129 		 RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_ADDR));  in gmc_v7_0_print_status()
1131 		 RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_STATUS));  in gmc_v7_0_print_status()
1133 		 RREG32(mmMC_VM_MX_L1_TLB_CNTL));  in gmc_v7_0_print_status()
1135 		 RREG32(mmVM_L2_CNTL));  in gmc_v7_0_print_status()
1137 		 RREG32(mmVM_L2_CNTL2));  in gmc_v7_0_print_status()
1139 		 RREG32(mmVM_L2_CNTL3));  in gmc_v7_0_print_status()
1141 		 RREG32(mmVM_CONTEXT0_PAGE_TABLE_START_ADDR));  in gmc_v7_0_print_status()
1143 		 RREG32(mmVM_CONTEXT0_PAGE_TABLE_END_ADDR));  in gmc_v7_0_print_status()
1145 		 RREG32(mmVM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR));  in gmc_v7_0_print_status()
1147 		 RREG32(mmVM_CONTEXT0_CNTL2));  in gmc_v7_0_print_status()
1149 		 RREG32(mmVM_CONTEXT0_CNTL));  in gmc_v7_0_print_status()
1151 		 RREG32(0x575));  in gmc_v7_0_print_status()
1153 		 RREG32(0x576));  in gmc_v7_0_print_status()
1155 		 RREG32(0x577));  in gmc_v7_0_print_status()
1157 		 RREG32(mmVM_CONTEXT1_PAGE_TABLE_START_ADDR));  in gmc_v7_0_print_status()
1159 		 RREG32(mmVM_CONTEXT1_PAGE_TABLE_END_ADDR));  in gmc_v7_0_print_status()
1161 		 RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR));  in gmc_v7_0_print_status()
1163 		 RREG32(mmVM_CONTEXT1_CNTL2));  in gmc_v7_0_print_status()
1165 		 RREG32(mmVM_CONTEXT1_CNTL));  in gmc_v7_0_print_status()
1169 				 i, RREG32(mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR + i));  in gmc_v7_0_print_status()
1172 				 i, RREG32(mmVM_CONTEXT8_PAGE_TABLE_BASE_ADDR + i - 8));  in gmc_v7_0_print_status()
1175 		 RREG32(mmMC_VM_SYSTEM_APERTURE_LOW_ADDR));  in gmc_v7_0_print_status()
1177 		 RREG32(mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR));  in gmc_v7_0_print_status()
1179 		 RREG32(mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR));  in gmc_v7_0_print_status()
1181 		 RREG32(mmMC_VM_FB_LOCATION));  in gmc_v7_0_print_status()
1183 		 RREG32(mmMC_VM_AGP_BASE));  in gmc_v7_0_print_status()
1185 		 RREG32(mmMC_VM_AGP_TOP));  in gmc_v7_0_print_status()
1187 		 RREG32(mmMC_VM_AGP_BOT));  in gmc_v7_0_print_status()
1191 			 RREG32(mmCHUB_CONTROL));  in gmc_v7_0_print_status()
1195 		 RREG32(mmHDP_REG_COHERENCY_FLUSH_CNTL));  in gmc_v7_0_print_status()
1197 		 RREG32(mmHDP_NONSURFACE_BASE));  in gmc_v7_0_print_status()
1199 		 RREG32(mmHDP_NONSURFACE_INFO));  in gmc_v7_0_print_status()
1201 		 RREG32(mmHDP_NONSURFACE_SIZE));  in gmc_v7_0_print_status()
1203 		 RREG32(mmHDP_MISC_CNTL));  in gmc_v7_0_print_status()
1205 		 RREG32(mmHDP_HOST_PATH_CNTL));  in gmc_v7_0_print_status()
1210 			 0xb05 + j, RREG32(0xb05 + j));  in gmc_v7_0_print_status()
1212 			 0xb06 + j, RREG32(0xb06 + j));  in gmc_v7_0_print_status()
1214 			 0xb07 + j, RREG32(0xb07 + j));  in gmc_v7_0_print_status()
1216 			 0xb08 + j, RREG32(0xb08 + j));  in gmc_v7_0_print_status()
1218 			 0xb09 + j, RREG32(0xb09 + j));  in gmc_v7_0_print_status()
1222 		 RREG32(mmBIF_FB_EN));  in gmc_v7_0_print_status()
1230 	u32 tmp = RREG32(mmSRBM_STATUS);  in gmc_v7_0_soft_reset()
1252 		tmp = RREG32(mmSRBM_SOFT_RESET);  in gmc_v7_0_soft_reset()
1256 		tmp = RREG32(mmSRBM_SOFT_RESET);  in gmc_v7_0_soft_reset()
1262 		tmp = RREG32(mmSRBM_SOFT_RESET);  in gmc_v7_0_soft_reset()
1292 		tmp = RREG32(mmVM_CONTEXT0_CNTL);  in gmc_v7_0_vm_fault_interrupt_state()
1296 		tmp = RREG32(mmVM_CONTEXT1_CNTL);  in gmc_v7_0_vm_fault_interrupt_state()
1302 		tmp = RREG32(mmVM_CONTEXT0_CNTL);  in gmc_v7_0_vm_fault_interrupt_state()
1306 		tmp = RREG32(mmVM_CONTEXT1_CNTL);  in gmc_v7_0_vm_fault_interrupt_state()
1323 	addr = RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_ADDR);  in gmc_v7_0_process_interrupt()
1324 	status = RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_STATUS);  in gmc_v7_0_process_interrupt()
1325 	mc_client = RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_MCCLIENT);  in gmc_v7_0_process_interrupt()