Lines Matching refs:PACKET3
641 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1)); in gfx_v8_0_ring_test_ring()
686 ib.ptr[0] = PACKET3(PACKET3_SET_UCONFIG_REG, 1); in gfx_v8_0_ring_test_ib()
1242 PACKET3(PACKET3_NOP, 0x3FFF), 0xf, in gfx_v8_0_sw_init()
1269 PACKET3(PACKET3_NOP, 0x3FFF), 0xf, in gfx_v8_0_sw_init()
3234 amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v8_0_cp_gfx_start()
3237 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v8_0_cp_gfx_start()
3245 PACKET3(PACKET3_SET_CONTEXT_REG, in gfx_v8_0_cp_gfx_start()
3255 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2)); in gfx_v8_0_cp_gfx_start()
3279 amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v8_0_cp_gfx_start()
3282 amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0)); in gfx_v8_0_cp_gfx_start()
3286 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2)); in gfx_v8_0_cp_gfx_start()
4416 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v8_0_ring_emit_gds_switch()
4424 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v8_0_ring_emit_gds_switch()
4432 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v8_0_ring_emit_gds_switch()
4440 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v8_0_ring_emit_gds_switch()
4531 amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); in gfx_v8_0_ring_emit_hdp_flush()
4557 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v8_0_ring_emit_ib_gfx()
4565 amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); in gfx_v8_0_ring_emit_ib_gfx()
4570 header = PACKET3(PACKET3_INDIRECT_BUFFER_CONST, 2); in gfx_v8_0_ring_emit_ib_gfx()
4572 header = PACKET3(PACKET3_INDIRECT_BUFFER, 2); in gfx_v8_0_ring_emit_ib_gfx()
4596 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v8_0_ring_emit_ib_compute()
4602 header = PACKET3(PACKET3_INDIRECT_BUFFER, 2); in gfx_v8_0_ring_emit_ib_compute()
4624 amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4)); in gfx_v8_0_ring_emit_fence_gfx()
4660 amdgpu_ring_write(ring, PACKET3(PACKET3_MEM_SEMAPHORE, 2)); in gfx_v8_0_ring_emit_semaphore()
4668 amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0)); in gfx_v8_0_ring_emit_semaphore()
4682 amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); in gfx_v8_0_ring_emit_vm_flush()
4694 amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); in gfx_v8_0_ring_emit_vm_flush()
4696 amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); in gfx_v8_0_ring_emit_vm_flush()
4700 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v8_0_ring_emit_vm_flush()
4716 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v8_0_ring_emit_vm_flush()
4724 amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); in gfx_v8_0_ring_emit_vm_flush()
4737 amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0)); in gfx_v8_0_ring_emit_vm_flush()
4739 amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); in gfx_v8_0_ring_emit_vm_flush()
4741 amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); in gfx_v8_0_ring_emit_vm_flush()
4773 amdgpu_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 5)); in gfx_v8_0_ring_emit_fence_compute()