3176 	if (adev->gfx.mec.hpd_eop_obj) {  in gfx_v7_0_mec_fini()
3177 		r = amdgpu_bo_reserve(adev->gfx.mec.hpd_eop_obj, false);  in gfx_v7_0_mec_fini()
3180 		amdgpu_bo_unpin(adev->gfx.mec.hpd_eop_obj);  in gfx_v7_0_mec_fini()
3181 		amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj);  in gfx_v7_0_mec_fini()
3183 		amdgpu_bo_unref(&adev->gfx.mec.hpd_eop_obj);  in gfx_v7_0_mec_fini()
3184 		adev->gfx.mec.hpd_eop_obj = NULL;  in gfx_v7_0_mec_fini()
3201 	adev->gfx.mec.num_mec = 1;  in gfx_v7_0_mec_init()
3202 	adev->gfx.mec.num_pipe = 1;  in gfx_v7_0_mec_init()
3203 	adev->gfx.mec.num_queue = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe * 8;  in gfx_v7_0_mec_init()
3205 	if (adev->gfx.mec.hpd_eop_obj == NULL) {  in gfx_v7_0_mec_init()
3207 				     adev->gfx.mec.num_mec *adev->gfx.mec.num_pipe * MEC_HPD_SIZE * 2,  in gfx_v7_0_mec_init()
3210 				     &adev->gfx.mec.hpd_eop_obj);  in gfx_v7_0_mec_init()
3217 	r = amdgpu_bo_reserve(adev->gfx.mec.hpd_eop_obj, false);  in gfx_v7_0_mec_init()
3222 	r = amdgpu_bo_pin(adev->gfx.mec.hpd_eop_obj, AMDGPU_GEM_DOMAIN_GTT,  in gfx_v7_0_mec_init()
3223 			  &adev->gfx.mec.hpd_eop_gpu_addr);  in gfx_v7_0_mec_init()
3229 	r = amdgpu_bo_kmap(adev->gfx.mec.hpd_eop_obj, (void **)&hpd);  in gfx_v7_0_mec_init()
3237 	memset(hpd, 0, adev->gfx.mec.num_mec *adev->gfx.mec.num_pipe * MEC_HPD_SIZE * 2);  in gfx_v7_0_mec_init()
3239 	amdgpu_bo_kunmap(adev->gfx.mec.hpd_eop_obj);  in gfx_v7_0_mec_init()
3240 	amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj);  in gfx_v7_0_mec_init()
3344 	for (i = 0; i < (adev->gfx.mec.num_pipe * adev->gfx.mec.num_mec); i++) {  in gfx_v7_0_cp_compute_resume()
3348 		eop_gpu_addr = adev->gfx.mec.hpd_eop_gpu_addr + (i * MEC_HPD_SIZE * 2);  in gfx_v7_0_cp_compute_resume()
5108 	for (i = 0; i < (adev->gfx.mec.num_pipe * adev->gfx.mec.num_mec); i++) {  in gfx_v7_0_print_status()