Lines Matching refs:gds

4836 	r = amdgpu_bo_create(adev, adev->gds.mem.gfx_partition_size,  in gfx_v7_0_sw_init()
4839 NULL, NULL, &adev->gds.gds_gfx_bo); in gfx_v7_0_sw_init()
4843 r = amdgpu_bo_create(adev, adev->gds.gws.gfx_partition_size, in gfx_v7_0_sw_init()
4846 NULL, NULL, &adev->gds.gws_gfx_bo); in gfx_v7_0_sw_init()
4850 r = amdgpu_bo_create(adev, adev->gds.oa.gfx_partition_size, in gfx_v7_0_sw_init()
4853 NULL, NULL, &adev->gds.oa_gfx_bo); in gfx_v7_0_sw_init()
4865 amdgpu_bo_unref(&adev->gds.oa_gfx_bo); in gfx_v7_0_sw_fini()
4866 amdgpu_bo_unref(&adev->gds.gws_gfx_bo); in gfx_v7_0_sw_fini()
4867 amdgpu_bo_unref(&adev->gds.gds_gfx_bo); in gfx_v7_0_sw_fini()
5630 adev->gds.mem.total_size = RREG32(mmGDS_VMID0_SIZE); in gfx_v7_0_set_gds_init()
5631 adev->gds.gws.total_size = 64; in gfx_v7_0_set_gds_init()
5632 adev->gds.oa.total_size = 16; in gfx_v7_0_set_gds_init()
5634 if (adev->gds.mem.total_size == 64 * 1024) { in gfx_v7_0_set_gds_init()
5635 adev->gds.mem.gfx_partition_size = 4096; in gfx_v7_0_set_gds_init()
5636 adev->gds.mem.cs_partition_size = 4096; in gfx_v7_0_set_gds_init()
5638 adev->gds.gws.gfx_partition_size = 4; in gfx_v7_0_set_gds_init()
5639 adev->gds.gws.cs_partition_size = 4; in gfx_v7_0_set_gds_init()
5641 adev->gds.oa.gfx_partition_size = 4; in gfx_v7_0_set_gds_init()
5642 adev->gds.oa.cs_partition_size = 1; in gfx_v7_0_set_gds_init()
5644 adev->gds.mem.gfx_partition_size = 1024; in gfx_v7_0_set_gds_init()
5645 adev->gds.mem.cs_partition_size = 1024; in gfx_v7_0_set_gds_init()
5647 adev->gds.gws.gfx_partition_size = 16; in gfx_v7_0_set_gds_init()
5648 adev->gds.gws.cs_partition_size = 16; in gfx_v7_0_set_gds_init()
5650 adev->gds.oa.gfx_partition_size = 4; in gfx_v7_0_set_gds_init()
5651 adev->gds.oa.cs_partition_size = 4; in gfx_v7_0_set_gds_init()