Lines Matching refs:sdma

122 	for (i = 0; i < adev->sdma.num_instances; i++) {  in cik_sdma_init_microcode()
127 err = request_firmware(&adev->sdma.instance[i].fw, fw_name, adev->dev); in cik_sdma_init_microcode()
130 err = amdgpu_ucode_validate(adev->sdma.instance[i].fw); in cik_sdma_init_microcode()
137 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_init_microcode()
138 release_firmware(adev->sdma.instance[i].fw); in cik_sdma_init_microcode()
139 adev->sdma.instance[i].fw = NULL; in cik_sdma_init_microcode()
171 u32 me = (ring == &adev->sdma.instance[0].ring) ? 0 : 1; in cik_sdma_ring_get_wptr()
186 u32 me = (ring == &adev->sdma.instance[0].ring) ? 0 : 1; in cik_sdma_ring_set_wptr()
193 struct amdgpu_sdma_instance *sdma = amdgpu_get_sdma_instance(ring); in cik_sdma_ring_insert_nop() local
197 if (sdma && sdma->burst_nop && (i == 0)) in cik_sdma_ring_insert_nop()
251 if (ring == &ring->adev->sdma.instance[0].ring) in cik_sdma_ring_emit_hdp_flush()
330 struct amdgpu_ring *sdma0 = &adev->sdma.instance[0].ring; in cik_sdma_gfx_stop()
331 struct amdgpu_ring *sdma1 = &adev->sdma.instance[1].ring; in cik_sdma_gfx_stop()
339 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_gfx_stop()
379 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_enable()
405 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_gfx_resume()
406 ring = &adev->sdma.instance[i].ring; in cik_sdma_gfx_resume()
508 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_load_microcode()
509 if (!adev->sdma.instance[i].fw) in cik_sdma_load_microcode()
511 hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data; in cik_sdma_load_microcode()
514 adev->sdma.instance[i].fw_version = le32_to_cpu(hdr->header.ucode_version); in cik_sdma_load_microcode()
515 adev->sdma.instance[i].feature_version = le32_to_cpu(hdr->ucode_feature_version); in cik_sdma_load_microcode()
516 if (adev->sdma.instance[i].feature_version >= 20) in cik_sdma_load_microcode()
517 adev->sdma.instance[i].burst_nop = true; in cik_sdma_load_microcode()
519 (adev->sdma.instance[i].fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); in cik_sdma_load_microcode()
523 WREG32(mmSDMA0_UCODE_ADDR + sdma_offsets[i], adev->sdma.instance[i].fw_version); in cik_sdma_load_microcode()
832 struct amdgpu_sdma_instance *sdma = amdgpu_get_sdma_instance(ib->ring); in cik_sdma_vm_pad_ib() local
838 if (sdma && sdma->burst_nop && (i == 0)) in cik_sdma_vm_pad_ib()
936 adev->sdma.num_instances = SDMA_MAX_INSTANCE; in cik_sdma_early_init()
959 r = amdgpu_irq_add_id(adev, 224, &adev->sdma.trap_irq); in cik_sdma_sw_init()
964 r = amdgpu_irq_add_id(adev, 241, &adev->sdma.illegal_inst_irq); in cik_sdma_sw_init()
969 r = amdgpu_irq_add_id(adev, 247, &adev->sdma.illegal_inst_irq); in cik_sdma_sw_init()
973 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_sw_init()
974 ring = &adev->sdma.instance[i].ring; in cik_sdma_sw_init()
979 &adev->sdma.trap_irq, in cik_sdma_sw_init()
995 for (i = 0; i < adev->sdma.num_instances; i++) in cik_sdma_sw_fini()
996 amdgpu_ring_fini(&adev->sdma.instance[i].ring); in cik_sdma_sw_fini()
1073 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_print_status()
1218 amdgpu_fence_process(&adev->sdma.instance[0].ring); in cik_sdma_process_trap_irq()
1231 amdgpu_fence_process(&adev->sdma.instance[1].ring); in cik_sdma_process_trap_irq()
1312 for (i = 0; i < adev->sdma.num_instances; i++) in cik_sdma_set_ring_funcs()
1313 adev->sdma.instance[i].ring.funcs = &cik_sdma_ring_funcs; in cik_sdma_set_ring_funcs()
1327 adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_LAST; in cik_sdma_set_irq_funcs()
1328 adev->sdma.trap_irq.funcs = &cik_sdma_trap_irq_funcs; in cik_sdma_set_irq_funcs()
1329 adev->sdma.illegal_inst_irq.funcs = &cik_sdma_illegal_inst_irq_funcs; in cik_sdma_set_irq_funcs()
1394 adev->mman.buffer_funcs_ring = &adev->sdma.instance[0].ring; in cik_sdma_set_buffer_funcs()
1409 adev->vm_manager.vm_pte_funcs_ring = &adev->sdma.instance[0].ring; in cik_sdma_set_vm_pte_funcs()