Lines Matching refs:graphic_level
3326 SMU7_Discrete_GraphicsLevel *graphic_level) in ci_populate_single_graphic_level() argument
3331 ret = ci_calculate_sclk_params(adev, engine_clock, graphic_level); in ci_populate_single_graphic_level()
3337 engine_clock, &graphic_level->MinVddc); in ci_populate_single_graphic_level()
3341 graphic_level->SclkFrequency = engine_clock; in ci_populate_single_graphic_level()
3343 graphic_level->Flags = 0; in ci_populate_single_graphic_level()
3344 graphic_level->MinVddcPhases = 1; in ci_populate_single_graphic_level()
3350 &graphic_level->MinVddcPhases); in ci_populate_single_graphic_level()
3352 graphic_level->ActivityLevel = sclk_activity_level_t; in ci_populate_single_graphic_level()
3354 graphic_level->CcPwrDynRm = 0; in ci_populate_single_graphic_level()
3355 graphic_level->CcPwrDynRm1 = 0; in ci_populate_single_graphic_level()
3356 graphic_level->EnabledForThrottle = 1; in ci_populate_single_graphic_level()
3357 graphic_level->UpH = 0; in ci_populate_single_graphic_level()
3358 graphic_level->DownH = 0; in ci_populate_single_graphic_level()
3359 graphic_level->VoltageDownH = 0; in ci_populate_single_graphic_level()
3360 graphic_level->PowerThrottle = 0; in ci_populate_single_graphic_level()
3363 graphic_level->DeepSleepDivId = ci_get_sleep_divider_id_from_clock(adev, in ci_populate_single_graphic_level()
3367 graphic_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in ci_populate_single_graphic_level()
3369 graphic_level->Flags = cpu_to_be32(graphic_level->Flags); in ci_populate_single_graphic_level()
3370 graphic_level->MinVddc = cpu_to_be32(graphic_level->MinVddc * VOLTAGE_SCALE); in ci_populate_single_graphic_level()
3371 graphic_level->MinVddcPhases = cpu_to_be32(graphic_level->MinVddcPhases); in ci_populate_single_graphic_level()
3372 graphic_level->SclkFrequency = cpu_to_be32(graphic_level->SclkFrequency); in ci_populate_single_graphic_level()
3373 graphic_level->ActivityLevel = cpu_to_be16(graphic_level->ActivityLevel); in ci_populate_single_graphic_level()
3374 graphic_level->CgSpllFuncCntl3 = cpu_to_be32(graphic_level->CgSpllFuncCntl3); in ci_populate_single_graphic_level()
3375 graphic_level->CgSpllFuncCntl4 = cpu_to_be32(graphic_level->CgSpllFuncCntl4); in ci_populate_single_graphic_level()
3376 graphic_level->SpllSpreadSpectrum = cpu_to_be32(graphic_level->SpllSpreadSpectrum); in ci_populate_single_graphic_level()
3377 graphic_level->SpllSpreadSpectrum2 = cpu_to_be32(graphic_level->SpllSpreadSpectrum2); in ci_populate_single_graphic_level()
3378 graphic_level->CcPwrDynRm = cpu_to_be32(graphic_level->CcPwrDynRm); in ci_populate_single_graphic_level()
3379 graphic_level->CcPwrDynRm1 = cpu_to_be32(graphic_level->CcPwrDynRm1); in ci_populate_single_graphic_level()
3380 graphic_level->EnabledForActivity = 1; in ci_populate_single_graphic_level()