291 		voltage_table->entries[i] = voltage_table->entries[i + diff];  in ci_trim_voltage_table_to_fit_state_table()
398 	if (adev->pm.dpm.dyn_state.cac_leakage_table.entries == NULL)  in ci_populate_bapm_vddc_vid_sidd()
408 			lo_vid[i] = ci_convert_to_vid(adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc1);  in ci_populate_bapm_vddc_vid_sidd()
409 			hi_vid[i] = ci_convert_to_vid(adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc2);  in ci_populate_bapm_vddc_vid_sidd()
410 			hi2_vid[i] = ci_convert_to_vid(adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc3);  in ci_populate_bapm_vddc_vid_sidd()
412 			lo_vid[i] = ci_convert_to_vid(adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc);  in ci_populate_bapm_vddc_vid_sidd()
413 			hi_vid[i] = ci_convert_to_vid((u16)adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].leakage);  in ci_populate_bapm_vddc_vid_sidd()
429 		vid[i] = ci_convert_to_vid(pi->vddc_voltage_table.entries[i].value);  in ci_populate_vddc_vid()
2228 		voltage_table->entries[i].value = voltage_dependency_table->entries[i].v;  in ci_get_svi2_voltage_table()
2229 		voltage_table->entries[i].smio_low = 0;  in ci_get_svi2_voltage_table()
2328 					      &pi->vddc_voltage_table.entries[count],  in ci_populate_smc_vddc_table()
2333 				pi->vddc_voltage_table.entries[count].smio_low;  in ci_populate_smc_vddc_table()
2351 					      &pi->vddci_voltage_table.entries[count],  in ci_populate_smc_vddci_table()
2356 				pi->vddci_voltage_table.entries[count].smio_low;  in ci_populate_smc_vddci_table()
2374 					      &pi->mvdd_voltage_table.entries[count],  in ci_populate_smc_mvdd_table()
2379 				pi->mvdd_voltage_table.entries[count].smio_low;  in ci_populate_smc_mvdd_table()
2416 			if (mclk <= adev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.entries[i].clk) {  in ci_populate_mvdd_value()
2417 				voltage->Voltage = pi->mvdd_voltage_table.entries[i].value;  in ci_populate_mvdd_value()
2438 	if (adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries == NULL)  in ci_get_std_voltage_value_sidd()
2441 	if (adev->pm.dpm.dyn_state.cac_leakage_table.entries) {  in ci_get_std_voltage_value_sidd()
2444 			    adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) {  in ci_get_std_voltage_value_sidd()
2451 					adev->pm.dpm.dyn_state.cac_leakage_table.entries[idx].vddc * VOLTAGE_SCALE;  in ci_get_std_voltage_value_sidd()
2453 					adev->pm.dpm.dyn_state.cac_leakage_table.entries[idx].leakage * VOLTAGE_SCALE;  in ci_get_std_voltage_value_sidd()
2461 				    adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) {  in ci_get_std_voltage_value_sidd()
2468 						adev->pm.dpm.dyn_state.cac_leakage_table.entries[idx].vddc * VOLTAGE_SCALE;  in ci_get_std_voltage_value_sidd()
2470 						adev->pm.dpm.dyn_state.cac_leakage_table.entries[idx].leakage * VOLTAGE_SCALE;  in ci_get_std_voltage_value_sidd()
2490 		if (sclk < limits->entries[i].sclk) {  in ci_populate_phase_value_based_on_sclk()
2507 		if (mclk < limits->entries[i].mclk) {  in ci_populate_phase_value_based_on_mclk()
2542 		if (allowed_clock_voltage_table->entries[i].clk >= clock) {  in ci_get_dependency_volt_by_clk()
2543 			*voltage = allowed_clock_voltage_table->entries[i].v;  in ci_get_dependency_volt_by_clk()
2548 	*voltage = allowed_clock_voltage_table->entries[i-1].v;  in ci_get_dependency_volt_by_clk()
2660 								   &arb_regs.entries[i][j]);  in ci_do_program_memory_timing_parameters()
2694 		if (adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[level].clk >=  in ci_populate_smc_initial_state()
2702 		if (adev->pm.dpm.dyn_state.vddc_dependency_on_mclk.entries[level].clk >=  in ci_populate_smc_initial_state()
2760 			adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[count].vclk;  in ci_populate_smc_uvd_level()
2762 			adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[count].dclk;  in ci_populate_smc_uvd_level()
2764 			adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[count].v * VOLTAGE_SCALE;  in ci_populate_smc_uvd_level()
2803 			adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[count].evclk;  in ci_populate_smc_vce_level()
2805 			(u16)adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[count].v * VOLTAGE_SCALE;  in ci_populate_smc_vce_level()
2836 			adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[count].clk;  in ci_populate_smc_acp_level()
2838 			adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[count].v;  in ci_populate_smc_acp_level()
2868 			adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[count].clk;  in ci_populate_smc_samu_level()
2870 			adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[count].v * VOLTAGE_SCALE;  in ci_populate_smc_samu_level()
2988 	if (adev->pm.dpm.dyn_state.vddc_dependency_on_mclk.entries) {  in ci_populate_single_memory_level()
2996 	if (adev->pm.dpm.dyn_state.vddci_dependency_on_mclk.entries) {  in ci_populate_single_memory_level()
3004 	if (adev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.entries) {  in ci_populate_single_memory_level()
3245 		if (ulv_voltage > adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[0].v)  in ci_populate_ulv_level()
3249 				adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[0].v - ulv_voltage;  in ci_populate_ulv_level()
3251 		if (ulv_voltage > adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[0].v)  in ci_populate_ulv_level()
3255 				((adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[0].v - ulv_voltage) *  in ci_populate_ulv_level()
3589 		     allowed_sclk_vddc_table->entries[i].clk)) {  in ci_setup_default_dpm_tables()
3591 				allowed_sclk_vddc_table->entries[i].clk;  in ci_setup_default_dpm_tables()
3602 		     allowed_mclk_table->entries[i].clk)) {  in ci_setup_default_dpm_tables()
3604 				allowed_mclk_table->entries[i].clk;  in ci_setup_default_dpm_tables()
3613 			allowed_sclk_vddc_table->entries[i].v;  in ci_setup_default_dpm_tables()
3615 			std_voltage_table->entries[i].leakage;  in ci_setup_default_dpm_tables()
3624 				allowed_mclk_table->entries[i].v;  in ci_setup_default_dpm_tables()
3634 				allowed_mclk_table->entries[i].v;  in ci_setup_default_dpm_tables()
3904 		if (adev->clock.current_dispclk == disp_voltage_table->entries[i].clk)  in ci_apply_disp_minimum_voltage_request()
3905 			requested_voltage = disp_voltage_table->entries[i].v;  in ci_apply_disp_minimum_voltage_request()
3909 		if (requested_voltage <= vddc_table->entries[i].v) {  in ci_apply_disp_minimum_voltage_request()
3910 			requested_voltage = vddc_table->entries[i].v;  in ci_apply_disp_minimum_voltage_request()
4051 			if (adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].v <= max_limits->vddc) {  in ci_enable_uvd_dpm()
4099 			if (adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].v <= max_limits->vddc) {  in ci_enable_vce_dpm()
4132 …	if (adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[i].v <= max_limits->vddc) {
4163 			if (adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[i].v <= max_limits->vddc) {
4212 		if (table->entries[i].evclk >= min_evclk)  in ci_get_vce_boot_level()
5073 	pi->min_vddc_in_pp_table = allowed_sclk_vddc_table->entries[0].v;  in ci_set_private_data_variables_based_on_pptable()
5075 		allowed_sclk_vddc_table->entries[allowed_sclk_vddc_table->count - 1].v;  in ci_set_private_data_variables_based_on_pptable()
5077 	pi->min_vddci_in_pp_table = allowed_mclk_vddci_table->entries[0].v;  in ci_set_private_data_variables_based_on_pptable()
5079 		allowed_mclk_vddci_table->entries[allowed_mclk_vddci_table->count - 1].v;  in ci_set_private_data_variables_based_on_pptable()
5082 		allowed_sclk_vddc_table->entries[allowed_sclk_vddc_table->count - 1].clk;  in ci_set_private_data_variables_based_on_pptable()
5084 		allowed_mclk_vddc_table->entries[allowed_sclk_vddc_table->count - 1].clk;  in ci_set_private_data_variables_based_on_pptable()
5086 		allowed_sclk_vddc_table->entries[allowed_sclk_vddc_table->count - 1].v;  in ci_set_private_data_variables_based_on_pptable()
5088 		allowed_mclk_vddci_table->entries[allowed_mclk_vddci_table->count - 1].v;  in ci_set_private_data_variables_based_on_pptable()
5128 			ci_patch_with_vddc_leakage(adev, &table->entries[i].v);  in ci_patch_clock_voltage_dependency_table_with_vddc_leakage()
5139 			ci_patch_with_vddci_leakage(adev, &table->entries[i].v);  in ci_patch_clock_voltage_dependency_table_with_vddci_leakage()
5150 			ci_patch_with_vddc_leakage(adev, &table->entries[i].v);  in ci_patch_vce_clock_voltage_dependency_table_with_vddc_leakage()
5161 			ci_patch_with_vddc_leakage(adev, &table->entries[i].v);  in ci_patch_uvd_clock_voltage_dependency_table_with_vddc_leakage()
5172 			ci_patch_with_vddc_leakage(adev, &table->entries[i].voltage);  in ci_patch_vddc_phase_shed_limit_table_with_vddc_leakage()
5192 			ci_patch_with_vddc_leakage(adev, &table->entries[i].vddc);  in ci_patch_cac_leakage_table_with_vddc_leakage()
5781 	kfree(adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries);  in ci_dpm_fini()
5927 	adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries =  in ci_dpm_init()
5929 	if (!adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries) {  in ci_dpm_init()
5934 	adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].clk = 0;  in ci_dpm_init()
5935 	adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].v = 0;  in ci_dpm_init()
5936 	adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].clk = 36000;  in ci_dpm_init()
5937 	adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].v = 720;  in ci_dpm_init()
5938 	adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].clk = 54000;  in ci_dpm_init()
5939 	adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].v = 810;  in ci_dpm_init()
5940 	adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].clk = 72000;  in ci_dpm_init()
5941 	adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].v = 900;  in ci_dpm_init()