212 	uint64_t pd_addr = amdgpu_bo_gpu_offset(vm->page_directory);  in amdgpu_vm_flush()
301 				   uint64_t pe, uint64_t addr,  in amdgpu_vm_update_pages()
308 		uint64_t src = adev->gart.table_addr + (addr >> 12) * 8;  in amdgpu_vm_update_pages()
345 	uint64_t addr;  in amdgpu_vm_clear_bo()
400 uint64_t amdgpu_vm_map_gart(struct amdgpu_device *adev, uint64_t addr)  in amdgpu_vm_map_gart()
402 	uint64_t result;  in amdgpu_vm_map_gart()
432 	uint64_t pd_addr = amdgpu_bo_gpu_offset(pd);  in amdgpu_vm_update_page_directory()
434 	uint64_t last_pde = ~0, last_pt = ~0;  in amdgpu_vm_update_page_directory()
465 		uint64_t pde, pt;  in amdgpu_vm_update_page_directory()
542 				uint64_t pe_start, uint64_t pe_end,  in amdgpu_vm_frag_ptes()
543 				uint64_t addr, uint32_t flags,  in amdgpu_vm_frag_ptes()
566 	uint64_t frag_flags = AMDGPU_PTE_FRAG_64KB;  in amdgpu_vm_frag_ptes()
567 	uint64_t frag_align = 0x80;  in amdgpu_vm_frag_ptes()
569 	uint64_t frag_start = ALIGN(pe_start, frag_align);  in amdgpu_vm_frag_ptes()
570 	uint64_t frag_end = pe_end & ~(frag_align - 1);  in amdgpu_vm_frag_ptes()
624 				 uint64_t start, uint64_t end,  in amdgpu_vm_update_ptes()
625 				 uint64_t dst, uint32_t flags,  in amdgpu_vm_update_ptes()
628 	uint64_t mask = AMDGPU_VM_PTE_COUNT - 1;  in amdgpu_vm_update_ptes()
629 	uint64_t last_pte = ~0, last_dst = ~0;  in amdgpu_vm_update_ptes()
632 	uint64_t addr;  in amdgpu_vm_update_ptes()
640 		uint64_t pt_idx = addr >> amdgpu_vm_block_size;  in amdgpu_vm_update_ptes()
643 		uint64_t pte;  in amdgpu_vm_update_ptes()
706 				       uint64_t addr, uint32_t gtt_flags,  in amdgpu_vm_bo_update_mapping()
828 	uint64_t addr;  in amdgpu_vm_bo_update()
997 		     uint64_t saddr, uint64_t offset,  in amdgpu_vm_bo_map()
998 		     uint64_t size, uint32_t flags)  in amdgpu_vm_bo_map()
1004 	uint64_t eaddr;  in amdgpu_vm_bo_map()
1129 		       uint64_t saddr)  in amdgpu_vm_bo_unmap()