Lines Matching refs:bo

104 	list[0].tv.bo = &vm->page_directory->tbo;  in amdgpu_vm_get_bos()
109 if (!vm->page_tables[i].bo) in amdgpu_vm_get_bos()
112 list[idx].robj = vm->page_tables[i].bo; in amdgpu_vm_get_bos()
116 list[idx].tv.bo = &list[idx].robj->tbo; in amdgpu_vm_get_bos()
272 struct amdgpu_bo *bo) in amdgpu_vm_bo_find() argument
276 list_for_each_entry(bo_va, &bo->va, bo_list) { in amdgpu_vm_bo_find()
339 struct amdgpu_bo *bo) in amdgpu_vm_clear_bo() argument
348 r = reservation_object_reserve_shared(bo->tbo.resv); in amdgpu_vm_clear_bo()
352 r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false); in amdgpu_vm_clear_bo()
356 addr = amdgpu_bo_gpu_offset(bo); in amdgpu_vm_clear_bo()
357 entries = amdgpu_bo_size(bo) / 8; in amdgpu_vm_clear_bo()
377 amdgpu_bo_fence(bo, fence, true); in amdgpu_vm_clear_bo()
464 struct amdgpu_bo *bo = vm->page_tables[pt_idx].bo; in amdgpu_vm_update_page_directory() local
467 if (bo == NULL) in amdgpu_vm_update_page_directory()
470 pt = amdgpu_bo_gpu_offset(bo); in amdgpu_vm_update_page_directory()
641 struct amdgpu_bo *pt = vm->page_tables[pt_idx].bo; in amdgpu_vm_update_ptes()
839 flags = amdgpu_ttm_tt_pte_flags(adev, bo_va->bo->tbo.ttm, mem); in amdgpu_vm_bo_update()
960 struct amdgpu_bo *bo) in amdgpu_vm_bo_add() argument
969 bo_va->bo = bo; in amdgpu_vm_bo_add()
976 list_add_tail(&bo_va->bo_list, &bo->va); in amdgpu_vm_bo_add()
1014 if ((saddr >= eaddr) || (offset + size > amdgpu_bo_size(bo_va->bo))) in amdgpu_vm_bo_map()
1035 "0x%010lx-0x%010lx\n", bo_va->bo, saddr, eaddr, in amdgpu_vm_bo_map()
1075 if (vm->page_tables[pt_idx].bo) in amdgpu_vm_bo_map()
1098 vm->page_tables[pt_idx].bo = pt; in amdgpu_vm_bo_map()
1227 struct amdgpu_bo *bo) in amdgpu_vm_bo_invalidate() argument
1231 list_for_each_entry(bo_va, &bo->va, bo_list) { in amdgpu_vm_bo_invalidate()
1328 amdgpu_bo_unref(&vm->page_tables[i].bo); in amdgpu_vm_fini()