64 	struct amdgpu_cs_parser *parser;  member
343 	lo = amdgpu_get_ib_value(ctx->parser, ctx->ib_idx, ctx->data0);  in amdgpu_uvd_cs_pass1()
344 	hi = amdgpu_get_ib_value(ctx->parser, ctx->ib_idx, ctx->data1);  in amdgpu_uvd_cs_pass1()
347 	mapping = amdgpu_cs_find_mapping(ctx->parser, addr, &bo);  in amdgpu_uvd_cs_pass1()
353 	if (!ctx->parser->adev->uvd.address_64_bit) {  in amdgpu_uvd_cs_pass1()
355 		cmd = amdgpu_get_ib_value(ctx->parser, ctx->ib_idx, ctx->idx) >> 1;  in amdgpu_uvd_cs_pass1()
522 	struct amdgpu_device *adev = ctx->parser->adev;  in amdgpu_uvd_cs_msg()
569 				adev->uvd.filp[i] = ctx->parser->filp;  in amdgpu_uvd_cs_msg()
587 				if (adev->uvd.filp[i] != ctx->parser->filp) {  in amdgpu_uvd_cs_msg()
630 	lo = amdgpu_get_ib_value(ctx->parser, ctx->ib_idx, ctx->data0);  in amdgpu_uvd_cs_pass2()
631 	hi = amdgpu_get_ib_value(ctx->parser, ctx->ib_idx, ctx->data1);  in amdgpu_uvd_cs_pass2()
634 	mapping = amdgpu_cs_find_mapping(ctx->parser, addr, &bo);  in amdgpu_uvd_cs_pass2()
646 	ib = &ctx->parser->ibs[ctx->ib_idx];  in amdgpu_uvd_cs_pass2()
650 	cmd = amdgpu_get_ib_value(ctx->parser, ctx->ib_idx, ctx->idx) >> 1;  in amdgpu_uvd_cs_pass2()
671 	if (!ctx->parser->adev->uvd.address_64_bit) {  in amdgpu_uvd_cs_pass2()
679 		    (start >> 28) != (ctx->parser->adev->uvd.gpu_addr >> 28)) {  in amdgpu_uvd_cs_pass2()
710 	struct amdgpu_ib *ib = &ctx->parser->ibs[ctx->ib_idx];  in amdgpu_uvd_cs_reg()
756 	struct amdgpu_ib *ib = &ctx->parser->ibs[ctx->ib_idx];  in amdgpu_uvd_cs_packets()
760 		uint32_t cmd = amdgpu_get_ib_value(ctx->parser, ctx->ib_idx, ctx->idx);  in amdgpu_uvd_cs_packets()
788 int amdgpu_uvd_ring_parse_cs(struct amdgpu_cs_parser *parser, uint32_t ib_idx)  in amdgpu_uvd_ring_parse_cs()  argument
798 	struct amdgpu_ib *ib = &parser->ibs[ib_idx];  in amdgpu_uvd_ring_parse_cs()
807 	ctx.parser = parser;  in amdgpu_uvd_ring_parse_cs()
826 	amdgpu_uvd_note_usage(ctx.parser->adev);  in amdgpu_uvd_ring_parse_cs()