40 			adev->pm.dpm.ac_power = true;  in amdgpu_pm_acpi_event_handler()
42 			adev->pm.dpm.ac_power = false;  in amdgpu_pm_acpi_event_handler()
44 			amdgpu_dpm_enable_bapm(adev, adev->pm.dpm.ac_power);  in amdgpu_pm_acpi_event_handler()
55 	enum amdgpu_pm_state_type pm = adev->pm.dpm.user_state;  in amdgpu_get_dpm_state()
72 		adev->pm.dpm.user_state = POWER_STATE_TYPE_BATTERY;  in amdgpu_set_dpm_state()
74 		adev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED;  in amdgpu_set_dpm_state()
76 		adev->pm.dpm.user_state = POWER_STATE_TYPE_PERFORMANCE;  in amdgpu_set_dpm_state()
98 	enum amdgpu_dpm_forced_level level = adev->pm.dpm.forced_level;  in amdgpu_get_dpm_forced_performance_level()
127 		if (adev->pm.dpm.thermal_active) {  in amdgpu_set_dpm_forced_performance_level()
170 		temp = adev->pm.dpm.thermal.min_temp;  in amdgpu_hwmon_show_temp_thresh()
172 		temp = adev->pm.dpm.thermal.max_temp;  in amdgpu_hwmon_show_temp_thresh()
352 			     pm.dpm.thermal.work);  in amdgpu_dpm_thermal_work_handler()
362 		if (temp < adev->pm.dpm.thermal.min_temp)  in amdgpu_dpm_thermal_work_handler()
364 			dpm_state = adev->pm.dpm.user_state;  in amdgpu_dpm_thermal_work_handler()
366 		if (adev->pm.dpm.thermal.high_to_low)  in amdgpu_dpm_thermal_work_handler()
368 			dpm_state = adev->pm.dpm.user_state;  in amdgpu_dpm_thermal_work_handler()
372 		adev->pm.dpm.thermal_active = true;  in amdgpu_dpm_thermal_work_handler()
374 		adev->pm.dpm.thermal_active = false;  in amdgpu_dpm_thermal_work_handler()
375 	adev->pm.dpm.state = dpm_state;  in amdgpu_dpm_thermal_work_handler()
387 	bool single_display = (adev->pm.dpm.new_active_crtc_count < 2) ?  in amdgpu_dpm_pick_power_state()
407 	for (i = 0; i < adev->pm.dpm.num_ps; i++) {  in amdgpu_dpm_pick_power_state()
408 		ps = &adev->pm.dpm.ps[i];  in amdgpu_dpm_pick_power_state()
441 			if (adev->pm.dpm.uvd_ps)  in amdgpu_dpm_pick_power_state()
442 				return adev->pm.dpm.uvd_ps;  in amdgpu_dpm_pick_power_state()
462 			return adev->pm.dpm.boot_ps;  in amdgpu_dpm_pick_power_state()
491 		if (adev->pm.dpm.uvd_ps) {  in amdgpu_dpm_pick_power_state()
492 			return adev->pm.dpm.uvd_ps;  in amdgpu_dpm_pick_power_state()
526 	if (adev->pm.dpm.user_state != adev->pm.dpm.state) {  in amdgpu_dpm_change_power_state_locked()
528 		if ((!adev->pm.dpm.thermal_active) &&  in amdgpu_dpm_change_power_state_locked()
529 		    (!adev->pm.dpm.uvd_active))  in amdgpu_dpm_change_power_state_locked()
530 			adev->pm.dpm.state = adev->pm.dpm.user_state;  in amdgpu_dpm_change_power_state_locked()
532 	dpm_state = adev->pm.dpm.state;  in amdgpu_dpm_change_power_state_locked()
536 		adev->pm.dpm.requested_ps = ps;  in amdgpu_dpm_change_power_state_locked()
541 	if (adev->pm.dpm.current_ps == adev->pm.dpm.requested_ps) {  in amdgpu_dpm_change_power_state_locked()
543 		if (ps->vce_active != adev->pm.dpm.vce_active)  in amdgpu_dpm_change_power_state_locked()
549 			if (adev->pm.dpm.new_active_crtcs != adev->pm.dpm.current_active_crtcs) {  in amdgpu_dpm_change_power_state_locked()
554 				adev->pm.dpm.current_active_crtcs = adev->pm.dpm.new_active_crtcs;  in amdgpu_dpm_change_power_state_locked()
555 				adev->pm.dpm.current_active_crtc_count = adev->pm.dpm.new_active_crtc_count;  in amdgpu_dpm_change_power_state_locked()
563 			if (adev->pm.dpm.new_active_crtcs ==  in amdgpu_dpm_change_power_state_locked()
564 			    adev->pm.dpm.current_active_crtcs) {  in amdgpu_dpm_change_power_state_locked()
566 			} else if ((adev->pm.dpm.current_active_crtc_count > 1) &&  in amdgpu_dpm_change_power_state_locked()
567 				   (adev->pm.dpm.new_active_crtc_count > 1)) {  in amdgpu_dpm_change_power_state_locked()
572 				adev->pm.dpm.current_active_crtcs = adev->pm.dpm.new_active_crtcs;  in amdgpu_dpm_change_power_state_locked()
573 				adev->pm.dpm.current_active_crtc_count = adev->pm.dpm.new_active_crtc_count;  in amdgpu_dpm_change_power_state_locked()
582 		amdgpu_dpm_print_power_state(adev, adev->pm.dpm.current_ps);  in amdgpu_dpm_change_power_state_locked()
584 		amdgpu_dpm_print_power_state(adev, adev->pm.dpm.requested_ps);  in amdgpu_dpm_change_power_state_locked()
590 	ps->vce_active = adev->pm.dpm.vce_active;  in amdgpu_dpm_change_power_state_locked()
610 	adev->pm.dpm.current_ps = adev->pm.dpm.requested_ps;  in amdgpu_dpm_change_power_state_locked()
617 	adev->pm.dpm.current_active_crtcs = adev->pm.dpm.new_active_crtcs;  in amdgpu_dpm_change_power_state_locked()
618 	adev->pm.dpm.current_active_crtc_count = adev->pm.dpm.new_active_crtc_count;  in amdgpu_dpm_change_power_state_locked()
621 		if (adev->pm.dpm.thermal_active) {  in amdgpu_dpm_change_power_state_locked()
622 			enum amdgpu_dpm_forced_level level = adev->pm.dpm.forced_level;  in amdgpu_dpm_change_power_state_locked()
626 			adev->pm.dpm.forced_level = level;  in amdgpu_dpm_change_power_state_locked()
629 			amdgpu_dpm_force_performance_level(adev, adev->pm.dpm.forced_level);  in amdgpu_dpm_change_power_state_locked()
647 			adev->pm.dpm.uvd_active = true;  in amdgpu_dpm_enable_uvd()
648 			adev->pm.dpm.state = POWER_STATE_TYPE_INTERNAL_UVD;  in amdgpu_dpm_enable_uvd()
652 			adev->pm.dpm.uvd_active = false;  in amdgpu_dpm_enable_uvd()
671 			adev->pm.dpm.vce_active = true;  in amdgpu_dpm_enable_vce()
673 			adev->pm.dpm.vce_level = AMDGPU_VCE_LEVEL_AC_ALL;  in amdgpu_dpm_enable_vce()
677 			adev->pm.dpm.vce_active = false;  in amdgpu_dpm_enable_vce()
689 	for (i = 0; i < adev->pm.dpm.num_ps; i++) {  in amdgpu_pm_print_power_states()
691 		amdgpu_dpm_print_power_state(adev, &adev->pm.dpm.ps[i]);  in amdgpu_pm_print_power_states()
755 	adev->pm.dpm.new_active_crtcs = 0;  in amdgpu_pm_compute_clocks()
756 	adev->pm.dpm.new_active_crtc_count = 0;  in amdgpu_pm_compute_clocks()
762 				adev->pm.dpm.new_active_crtcs |= (1 << amdgpu_crtc->crtc_id);  in amdgpu_pm_compute_clocks()
763 				adev->pm.dpm.new_active_crtc_count++;  in amdgpu_pm_compute_clocks()
770 		adev->pm.dpm.ac_power = true;  in amdgpu_pm_compute_clocks()
772 		adev->pm.dpm.ac_power = false;  in amdgpu_pm_compute_clocks()