207 			for (i = 0; i < adev->gfx.num_gfx_rings; i++)  in amdgpu_info_ioctl()
208 				ring_mask |= ((adev->gfx.gfx_ring[i].ready ? 1 : 0) << i);  in amdgpu_info_ioctl()
214 			for (i = 0; i < adev->gfx.num_compute_rings; i++)  in amdgpu_info_ioctl()
215 				ring_mask |= ((adev->gfx.compute_ring[i].ready ? 1 : 0) << i);  in amdgpu_info_ioctl()
314 			fw_info.ver = adev->gfx.me_fw_version;  in amdgpu_info_ioctl()
315 			fw_info.feature = adev->gfx.me_feature_version;  in amdgpu_info_ioctl()
318 			fw_info.ver = adev->gfx.pfp_fw_version;  in amdgpu_info_ioctl()
319 			fw_info.feature = adev->gfx.pfp_feature_version;  in amdgpu_info_ioctl()
322 			fw_info.ver = adev->gfx.ce_fw_version;  in amdgpu_info_ioctl()
323 			fw_info.feature = adev->gfx.ce_feature_version;  in amdgpu_info_ioctl()
326 			fw_info.ver = adev->gfx.rlc_fw_version;  in amdgpu_info_ioctl()
327 			fw_info.feature = adev->gfx.rlc_feature_version;  in amdgpu_info_ioctl()
331 				fw_info.ver = adev->gfx.mec_fw_version;  in amdgpu_info_ioctl()
332 				fw_info.feature = adev->gfx.mec_feature_version;  in amdgpu_info_ioctl()
334 				fw_info.ver = adev->gfx.mec2_fw_version;  in amdgpu_info_ioctl()
335 				fw_info.feature = adev->gfx.mec2_feature_version;  in amdgpu_info_ioctl()
436 		dev_info.num_shader_engines = adev->gfx.config.max_shader_engines;  in amdgpu_info_ioctl()
437 		dev_info.num_shader_arrays_per_engine = adev->gfx.config.max_sh_per_se;  in amdgpu_info_ioctl()
449 		dev_info.enabled_rb_pipes_mask = adev->gfx.config.backend_enable_mask;  in amdgpu_info_ioctl()
450 		dev_info.num_rb_pipes = adev->gfx.config.max_backends_per_se *  in amdgpu_info_ioctl()
451 					adev->gfx.config.max_shader_engines;  in amdgpu_info_ioctl()
452 		dev_info.num_hw_gfx_contexts = adev->gfx.config.max_hw_contexts;  in amdgpu_info_ioctl()
467 		dev_info.ce_ram_size = adev->gfx.ce_ram_size;  in amdgpu_info_ioctl()