428 		struct drm_amdgpu_info_device dev_info = {};  in amdgpu_info_ioctl()  local
431 		dev_info.device_id = dev->pdev->device;  in amdgpu_info_ioctl()
432 		dev_info.chip_rev = adev->rev_id;  in amdgpu_info_ioctl()
433 		dev_info.external_rev = adev->external_rev_id;  in amdgpu_info_ioctl()
434 		dev_info.pci_rev = dev->pdev->revision;  in amdgpu_info_ioctl()
435 		dev_info.family = adev->family;  in amdgpu_info_ioctl()
436 		dev_info.num_shader_engines = adev->gfx.config.max_shader_engines;  in amdgpu_info_ioctl()
437 		dev_info.num_shader_arrays_per_engine = adev->gfx.config.max_sh_per_se;  in amdgpu_info_ioctl()
439 		dev_info.gpu_counter_freq = amdgpu_asic_get_xclk(adev) * 10;  in amdgpu_info_ioctl()
441 			dev_info.max_engine_clock =  in amdgpu_info_ioctl()
443 			dev_info.max_memory_clock =  in amdgpu_info_ioctl()
446 			dev_info.max_engine_clock = adev->pm.default_sclk * 10;  in amdgpu_info_ioctl()
447 			dev_info.max_memory_clock = adev->pm.default_mclk * 10;  in amdgpu_info_ioctl()
449 		dev_info.enabled_rb_pipes_mask = adev->gfx.config.backend_enable_mask;  in amdgpu_info_ioctl()
450 		dev_info.num_rb_pipes = adev->gfx.config.max_backends_per_se *  in amdgpu_info_ioctl()
452 		dev_info.num_hw_gfx_contexts = adev->gfx.config.max_hw_contexts;  in amdgpu_info_ioctl()
453 		dev_info._pad = 0;  in amdgpu_info_ioctl()
454 		dev_info.ids_flags = 0;  in amdgpu_info_ioctl()
456 			dev_info.ids_flags |= AMDGPU_IDS_FLAGS_FUSION;  in amdgpu_info_ioctl()
457 		dev_info.virtual_address_offset = AMDGPU_VA_RESERVED_SIZE;  in amdgpu_info_ioctl()
458 		dev_info.virtual_address_max = (uint64_t)adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE;  in amdgpu_info_ioctl()
459 		dev_info.virtual_address_alignment = max((int)PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE);  in amdgpu_info_ioctl()
460 		dev_info.pte_fragment_size = (1 << AMDGPU_LOG2_PAGES_PER_FRAG) *  in amdgpu_info_ioctl()
462 		dev_info.gart_page_size = AMDGPU_GPU_PAGE_SIZE;  in amdgpu_info_ioctl()
465 		dev_info.cu_active_number = cu_info.number;  in amdgpu_info_ioctl()
466 		dev_info.cu_ao_mask = cu_info.ao_cu_mask;  in amdgpu_info_ioctl()
467 		dev_info.ce_ram_size = adev->gfx.ce_ram_size;  in amdgpu_info_ioctl()
468 		memcpy(&dev_info.cu_bitmap[0], &cu_info.bitmap[0], sizeof(cu_info.bitmap));  in amdgpu_info_ioctl()
469 		dev_info.vram_type = adev->mc.vram_type;  in amdgpu_info_ioctl()
470 		dev_info.vram_bit_width = adev->mc.vram_width;  in amdgpu_info_ioctl()
471 		dev_info.vce_harvest_config = adev->vce.harvest_config;  in amdgpu_info_ioctl()
473 		return copy_to_user(out, &dev_info,  in amdgpu_info_ioctl()
474 				    min((size_t)size, sizeof(dev_info))) ? -EFAULT : 0;  in amdgpu_info_ioctl()