Lines Matching refs:adev
55 struct amdgpu_device *adev = dev->dev_private; in amdgpu_driver_unload_kms() local
57 if (adev == NULL) in amdgpu_driver_unload_kms()
60 if (adev->rmmio == NULL) in amdgpu_driver_unload_kms()
65 amdgpu_amdkfd_device_fini(adev); in amdgpu_driver_unload_kms()
67 amdgpu_acpi_fini(adev); in amdgpu_driver_unload_kms()
69 amdgpu_device_fini(adev); in amdgpu_driver_unload_kms()
72 kfree(adev); in amdgpu_driver_unload_kms()
88 struct amdgpu_device *adev; in amdgpu_driver_load_kms() local
91 adev = kzalloc(sizeof(struct amdgpu_device), GFP_KERNEL); in amdgpu_driver_load_kms()
92 if (adev == NULL) { in amdgpu_driver_load_kms()
95 dev->dev_private = (void *)adev; in amdgpu_driver_load_kms()
108 r = amdgpu_device_init(adev, dev, dev->pdev, flags); in amdgpu_driver_load_kms()
118 acpi_status = amdgpu_acpi_init(adev); in amdgpu_driver_load_kms()
124 amdgpu_amdkfd_load_interface(adev); in amdgpu_driver_load_kms()
125 amdgpu_amdkfd_device_probe(adev); in amdgpu_driver_load_kms()
126 amdgpu_amdkfd_device_init(adev); in amdgpu_driver_load_kms()
162 struct amdgpu_device *adev = dev->dev_private; in amdgpu_info_ioctl() local
164 struct amdgpu_mode_info *minfo = &adev->mode_info; in amdgpu_info_ioctl()
177 ui32 = adev->accel_working; in amdgpu_info_ioctl()
180 for (i = 0, found = 0; i < adev->mode_info.num_crtc; i++) { in amdgpu_info_ioctl()
207 for (i = 0; i < adev->gfx.num_gfx_rings; i++) in amdgpu_info_ioctl()
208 ring_mask |= ((adev->gfx.gfx_ring[i].ready ? 1 : 0) << i); in amdgpu_info_ioctl()
214 for (i = 0; i < adev->gfx.num_compute_rings; i++) in amdgpu_info_ioctl()
215 ring_mask |= ((adev->gfx.compute_ring[i].ready ? 1 : 0) << i); in amdgpu_info_ioctl()
221 for (i = 0; i < adev->sdma.num_instances; i++) in amdgpu_info_ioctl()
222 ring_mask |= ((adev->sdma.instance[i].ring.ready ? 1 : 0) << i); in amdgpu_info_ioctl()
228 ring_mask = adev->uvd.ring.ready ? 1 : 0; in amdgpu_info_ioctl()
235 ring_mask |= ((adev->vce.ring[i].ready ? 1 : 0) << i); in amdgpu_info_ioctl()
243 for (i = 0; i < adev->num_ip_blocks; i++) { in amdgpu_info_ioctl()
244 if (adev->ip_blocks[i].type == type && in amdgpu_info_ioctl()
245 adev->ip_block_status[i].valid) { in amdgpu_info_ioctl()
246 ip.hw_ip_version_major = adev->ip_blocks[i].major; in amdgpu_info_ioctl()
247 ip.hw_ip_version_minor = adev->ip_blocks[i].minor; in amdgpu_info_ioctl()
282 for (i = 0; i < adev->num_ip_blocks; i++) in amdgpu_info_ioctl()
283 if (adev->ip_blocks[i].type == type && in amdgpu_info_ioctl()
284 adev->ip_block_status[i].valid && in amdgpu_info_ioctl()
291 ui64 = amdgpu_asic_get_gpu_clock_counter(adev); in amdgpu_info_ioctl()
302 fw_info.ver = adev->vce.fw_version; in amdgpu_info_ioctl()
303 fw_info.feature = adev->vce.fb_version; in amdgpu_info_ioctl()
306 fw_info.ver = adev->uvd.fw_version; in amdgpu_info_ioctl()
310 fw_info.ver = adev->mc.fw_version; in amdgpu_info_ioctl()
314 fw_info.ver = adev->gfx.me_fw_version; in amdgpu_info_ioctl()
315 fw_info.feature = adev->gfx.me_feature_version; in amdgpu_info_ioctl()
318 fw_info.ver = adev->gfx.pfp_fw_version; in amdgpu_info_ioctl()
319 fw_info.feature = adev->gfx.pfp_feature_version; in amdgpu_info_ioctl()
322 fw_info.ver = adev->gfx.ce_fw_version; in amdgpu_info_ioctl()
323 fw_info.feature = adev->gfx.ce_feature_version; in amdgpu_info_ioctl()
326 fw_info.ver = adev->gfx.rlc_fw_version; in amdgpu_info_ioctl()
327 fw_info.feature = adev->gfx.rlc_feature_version; in amdgpu_info_ioctl()
331 fw_info.ver = adev->gfx.mec_fw_version; in amdgpu_info_ioctl()
332 fw_info.feature = adev->gfx.mec_feature_version; in amdgpu_info_ioctl()
334 fw_info.ver = adev->gfx.mec2_fw_version; in amdgpu_info_ioctl()
335 fw_info.feature = adev->gfx.mec2_feature_version; in amdgpu_info_ioctl()
340 fw_info.ver = adev->pm.fw_version; in amdgpu_info_ioctl()
344 if (info->query_fw.index >= adev->sdma.num_instances) in amdgpu_info_ioctl()
346 fw_info.ver = adev->sdma.instance[info->query_fw.index].fw_version; in amdgpu_info_ioctl()
347 fw_info.feature = adev->sdma.instance[info->query_fw.index].feature_version; in amdgpu_info_ioctl()
356 ui64 = atomic64_read(&adev->num_bytes_moved); in amdgpu_info_ioctl()
359 ui64 = atomic64_read(&adev->vram_usage); in amdgpu_info_ioctl()
362 ui64 = atomic64_read(&adev->vram_vis_usage); in amdgpu_info_ioctl()
365 ui64 = atomic64_read(&adev->gtt_usage); in amdgpu_info_ioctl()
371 gds_info.gds_gfx_partition_size = adev->gds.mem.gfx_partition_size >> AMDGPU_GDS_SHIFT; in amdgpu_info_ioctl()
372 gds_info.compute_partition_size = adev->gds.mem.cs_partition_size >> AMDGPU_GDS_SHIFT; in amdgpu_info_ioctl()
373 gds_info.gds_total_size = adev->gds.mem.total_size >> AMDGPU_GDS_SHIFT; in amdgpu_info_ioctl()
374 gds_info.gws_per_gfx_partition = adev->gds.gws.gfx_partition_size >> AMDGPU_GWS_SHIFT; in amdgpu_info_ioctl()
375 gds_info.gws_per_compute_partition = adev->gds.gws.cs_partition_size >> AMDGPU_GWS_SHIFT; in amdgpu_info_ioctl()
376 gds_info.oa_per_gfx_partition = adev->gds.oa.gfx_partition_size >> AMDGPU_OA_SHIFT; in amdgpu_info_ioctl()
377 gds_info.oa_per_compute_partition = adev->gds.oa.cs_partition_size >> AMDGPU_OA_SHIFT; in amdgpu_info_ioctl()
384 vram_gtt.vram_size = adev->mc.real_vram_size; in amdgpu_info_ioctl()
385 vram_gtt.vram_cpu_accessible_size = adev->mc.visible_vram_size; in amdgpu_info_ioctl()
386 vram_gtt.vram_cpu_accessible_size -= adev->vram_pin_size; in amdgpu_info_ioctl()
387 vram_gtt.gtt_size = adev->mc.gtt_size; in amdgpu_info_ioctl()
388 vram_gtt.gtt_size -= adev->gart_pin_size; in amdgpu_info_ioctl()
415 if (amdgpu_asic_read_register(adev, se_num, sh_num, in amdgpu_info_ioctl()
432 dev_info.chip_rev = adev->rev_id; in amdgpu_info_ioctl()
433 dev_info.external_rev = adev->external_rev_id; in amdgpu_info_ioctl()
435 dev_info.family = adev->family; in amdgpu_info_ioctl()
436 dev_info.num_shader_engines = adev->gfx.config.max_shader_engines; in amdgpu_info_ioctl()
437 dev_info.num_shader_arrays_per_engine = adev->gfx.config.max_sh_per_se; in amdgpu_info_ioctl()
439 dev_info.gpu_counter_freq = amdgpu_asic_get_xclk(adev) * 10; in amdgpu_info_ioctl()
440 if (adev->pm.dpm_enabled) { in amdgpu_info_ioctl()
442 adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk * 10; in amdgpu_info_ioctl()
444 adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk * 10; in amdgpu_info_ioctl()
446 dev_info.max_engine_clock = adev->pm.default_sclk * 10; in amdgpu_info_ioctl()
447 dev_info.max_memory_clock = adev->pm.default_mclk * 10; in amdgpu_info_ioctl()
449 dev_info.enabled_rb_pipes_mask = adev->gfx.config.backend_enable_mask; in amdgpu_info_ioctl()
450 dev_info.num_rb_pipes = adev->gfx.config.max_backends_per_se * in amdgpu_info_ioctl()
451 adev->gfx.config.max_shader_engines; in amdgpu_info_ioctl()
452 dev_info.num_hw_gfx_contexts = adev->gfx.config.max_hw_contexts; in amdgpu_info_ioctl()
455 if (adev->flags & AMD_IS_APU) in amdgpu_info_ioctl()
458 dev_info.virtual_address_max = (uint64_t)adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE; in amdgpu_info_ioctl()
464 amdgpu_asic_get_cu_info(adev, &cu_info); in amdgpu_info_ioctl()
467 dev_info.ce_ram_size = adev->gfx.ce_ram_size; in amdgpu_info_ioctl()
469 dev_info.vram_type = adev->mc.vram_type; in amdgpu_info_ioctl()
470 dev_info.vram_bit_width = adev->mc.vram_width; in amdgpu_info_ioctl()
471 dev_info.vce_harvest_config = adev->vce.harvest_config; in amdgpu_info_ioctl()
496 struct amdgpu_device *adev = dev->dev_private; in amdgpu_driver_lastclose_kms() local
498 amdgpu_fbdev_restore_mode(adev); in amdgpu_driver_lastclose_kms()
513 struct amdgpu_device *adev = dev->dev_private; in amdgpu_driver_open_kms() local
527 r = amdgpu_vm_init(adev, &fpriv->vm); in amdgpu_driver_open_kms()
559 struct amdgpu_device *adev = dev->dev_private; in amdgpu_driver_postclose_kms() local
569 amdgpu_vm_fini(adev, &fpriv->vm); in amdgpu_driver_postclose_kms()
593 struct amdgpu_device *adev = dev->dev_private; in amdgpu_driver_preclose_kms() local
595 amdgpu_uvd_free_handles(adev, file_priv); in amdgpu_driver_preclose_kms()
596 amdgpu_vce_free_handles(adev, file_priv); in amdgpu_driver_preclose_kms()
613 struct amdgpu_device *adev = dev->dev_private; in amdgpu_get_vblank_counter_kms() local
617 if (pipe >= adev->mode_info.num_crtc) { in amdgpu_get_vblank_counter_kms()
630 if (adev->mode_info.crtcs[pipe]) { in amdgpu_get_vblank_counter_kms()
635 count = amdgpu_display_vblank_get_counter(adev, pipe); in amdgpu_get_vblank_counter_kms()
643 &adev->mode_info.crtcs[pipe]->base.hwmode); in amdgpu_get_vblank_counter_kms()
644 } while (count != amdgpu_display_vblank_get_counter(adev, pipe)); in amdgpu_get_vblank_counter_kms()
662 count = amdgpu_display_vblank_get_counter(adev, pipe); in amdgpu_get_vblank_counter_kms()
680 struct amdgpu_device *adev = dev->dev_private; in amdgpu_enable_vblank_kms() local
681 int idx = amdgpu_crtc_idx_to_irq_type(adev, pipe); in amdgpu_enable_vblank_kms()
683 return amdgpu_irq_get(adev, &adev->crtc_irq, idx); in amdgpu_enable_vblank_kms()
696 struct amdgpu_device *adev = dev->dev_private; in amdgpu_disable_vblank_kms() local
697 int idx = amdgpu_crtc_idx_to_irq_type(adev, pipe); in amdgpu_disable_vblank_kms()
699 amdgpu_irq_put(adev, &adev->crtc_irq, idx); in amdgpu_disable_vblank_kms()
721 struct amdgpu_device *adev = dev->dev_private; in amdgpu_get_vblank_timestamp_kms() local
729 crtc = &adev->mode_info.crtcs[pipe]->base; in amdgpu_get_vblank_timestamp_kms()