Lines Matching refs:adev

37 static int amdgpu_ih_ring_alloc(struct amdgpu_device *adev)  in amdgpu_ih_ring_alloc()  argument
42 if (adev->irq.ih.ring_obj == NULL) { in amdgpu_ih_ring_alloc()
43 r = amdgpu_bo_create(adev, adev->irq.ih.ring_size, in amdgpu_ih_ring_alloc()
46 NULL, NULL, &adev->irq.ih.ring_obj); in amdgpu_ih_ring_alloc()
51 r = amdgpu_bo_reserve(adev->irq.ih.ring_obj, false); in amdgpu_ih_ring_alloc()
54 r = amdgpu_bo_pin(adev->irq.ih.ring_obj, in amdgpu_ih_ring_alloc()
56 &adev->irq.ih.gpu_addr); in amdgpu_ih_ring_alloc()
58 amdgpu_bo_unreserve(adev->irq.ih.ring_obj); in amdgpu_ih_ring_alloc()
62 r = amdgpu_bo_kmap(adev->irq.ih.ring_obj, in amdgpu_ih_ring_alloc()
63 (void **)&adev->irq.ih.ring); in amdgpu_ih_ring_alloc()
64 amdgpu_bo_unreserve(adev->irq.ih.ring_obj); in amdgpu_ih_ring_alloc()
82 int amdgpu_ih_ring_init(struct amdgpu_device *adev, unsigned ring_size, in amdgpu_ih_ring_init() argument
91 adev->irq.ih.ring_size = ring_size; in amdgpu_ih_ring_init()
92 adev->irq.ih.ptr_mask = adev->irq.ih.ring_size - 1; in amdgpu_ih_ring_init()
93 adev->irq.ih.rptr = 0; in amdgpu_ih_ring_init()
94 adev->irq.ih.use_bus_addr = use_bus_addr; in amdgpu_ih_ring_init()
96 if (adev->irq.ih.use_bus_addr) { in amdgpu_ih_ring_init()
97 if (!adev->irq.ih.ring) { in amdgpu_ih_ring_init()
101 adev->irq.ih.ring = pci_alloc_consistent(adev->pdev, in amdgpu_ih_ring_init()
102 adev->irq.ih.ring_size + 8, in amdgpu_ih_ring_init()
103 &adev->irq.ih.rb_dma_addr); in amdgpu_ih_ring_init()
104 if (adev->irq.ih.ring == NULL) in amdgpu_ih_ring_init()
106 memset((void *)adev->irq.ih.ring, 0, adev->irq.ih.ring_size + 8); in amdgpu_ih_ring_init()
107 adev->irq.ih.wptr_offs = (adev->irq.ih.ring_size / 4) + 0; in amdgpu_ih_ring_init()
108 adev->irq.ih.rptr_offs = (adev->irq.ih.ring_size / 4) + 1; in amdgpu_ih_ring_init()
112 r = amdgpu_wb_get(adev, &adev->irq.ih.wptr_offs); in amdgpu_ih_ring_init()
114 dev_err(adev->dev, "(%d) ih wptr_offs wb alloc failed\n", r); in amdgpu_ih_ring_init()
118 r = amdgpu_wb_get(adev, &adev->irq.ih.rptr_offs); in amdgpu_ih_ring_init()
120 amdgpu_wb_free(adev, adev->irq.ih.wptr_offs); in amdgpu_ih_ring_init()
121 dev_err(adev->dev, "(%d) ih rptr_offs wb alloc failed\n", r); in amdgpu_ih_ring_init()
125 return amdgpu_ih_ring_alloc(adev); in amdgpu_ih_ring_init()
137 void amdgpu_ih_ring_fini(struct amdgpu_device *adev) in amdgpu_ih_ring_fini() argument
141 if (adev->irq.ih.use_bus_addr) { in amdgpu_ih_ring_fini()
142 if (adev->irq.ih.ring) { in amdgpu_ih_ring_fini()
146 pci_free_consistent(adev->pdev, adev->irq.ih.ring_size + 8, in amdgpu_ih_ring_fini()
147 (void *)adev->irq.ih.ring, in amdgpu_ih_ring_fini()
148 adev->irq.ih.rb_dma_addr); in amdgpu_ih_ring_fini()
149 adev->irq.ih.ring = NULL; in amdgpu_ih_ring_fini()
152 if (adev->irq.ih.ring_obj) { in amdgpu_ih_ring_fini()
153 r = amdgpu_bo_reserve(adev->irq.ih.ring_obj, false); in amdgpu_ih_ring_fini()
155 amdgpu_bo_kunmap(adev->irq.ih.ring_obj); in amdgpu_ih_ring_fini()
156 amdgpu_bo_unpin(adev->irq.ih.ring_obj); in amdgpu_ih_ring_fini()
157 amdgpu_bo_unreserve(adev->irq.ih.ring_obj); in amdgpu_ih_ring_fini()
159 amdgpu_bo_unref(&adev->irq.ih.ring_obj); in amdgpu_ih_ring_fini()
160 adev->irq.ih.ring = NULL; in amdgpu_ih_ring_fini()
161 adev->irq.ih.ring_obj = NULL; in amdgpu_ih_ring_fini()
163 amdgpu_wb_free(adev, adev->irq.ih.wptr_offs); in amdgpu_ih_ring_fini()
164 amdgpu_wb_free(adev, adev->irq.ih.rptr_offs); in amdgpu_ih_ring_fini()
176 int amdgpu_ih_process(struct amdgpu_device *adev) in amdgpu_ih_process() argument
181 if (!adev->irq.ih.enabled || adev->shutdown) in amdgpu_ih_process()
184 wptr = amdgpu_ih_get_wptr(adev); in amdgpu_ih_process()
188 if (atomic_xchg(&adev->irq.ih.lock, 1)) in amdgpu_ih_process()
191 DRM_DEBUG("%s: rptr %d, wptr %d\n", __func__, adev->irq.ih.rptr, wptr); in amdgpu_ih_process()
196 while (adev->irq.ih.rptr != wptr) { in amdgpu_ih_process()
197 u32 ring_index = adev->irq.ih.rptr >> 2; in amdgpu_ih_process()
200 amdgpu_amdkfd_interrupt(adev, in amdgpu_ih_process()
201 (const void *) &adev->irq.ih.ring[ring_index]); in amdgpu_ih_process()
204 &adev->irq.ih.ring[ring_index]; in amdgpu_ih_process()
205 amdgpu_ih_decode_iv(adev, &entry); in amdgpu_ih_process()
206 adev->irq.ih.rptr &= adev->irq.ih.ptr_mask; in amdgpu_ih_process()
208 amdgpu_irq_dispatch(adev, &entry); in amdgpu_ih_process()
210 amdgpu_ih_set_rptr(adev); in amdgpu_ih_process()
211 atomic_set(&adev->irq.ih.lock, 0); in amdgpu_ih_process()
214 wptr = amdgpu_ih_get_wptr(adev); in amdgpu_ih_process()
215 if (wptr != adev->irq.ih.rptr) in amdgpu_ih_process()