173 	union drm_amdgpu_gem_create *args = data;  in amdgpu_gem_create_ioctl()  local
174 	uint64_t size = args->in.bo_size;  in amdgpu_gem_create_ioctl()
181 	if (args->in.domains & (AMDGPU_GEM_DOMAIN_GDS |  in amdgpu_gem_create_ioctl()
184 		if (args->in.domains == AMDGPU_GEM_DOMAIN_GDS)  in amdgpu_gem_create_ioctl()
186 		else if (args->in.domains == AMDGPU_GEM_DOMAIN_GWS)  in amdgpu_gem_create_ioctl()
188 		else if (args->in.domains == AMDGPU_GEM_DOMAIN_OA)  in amdgpu_gem_create_ioctl()
197 	r = amdgpu_gem_object_create(adev, size, args->in.alignment,  in amdgpu_gem_create_ioctl()
198 				     (u32)(0xffffffff & args->in.domains),  in amdgpu_gem_create_ioctl()
199 				     args->in.domain_flags,  in amdgpu_gem_create_ioctl()
210 	memset(args, 0, sizeof(*args));  in amdgpu_gem_create_ioctl()
211 	args->out.handle = handle;  in amdgpu_gem_create_ioctl()
223 	struct drm_amdgpu_gem_userptr *args = data;  in amdgpu_gem_userptr_ioctl()  local
229 	if (offset_in_page(args->addr | args->size))  in amdgpu_gem_userptr_ioctl()
233 	if (args->flags & ~(AMDGPU_GEM_USERPTR_READONLY |  in amdgpu_gem_userptr_ioctl()
238 	if (!(args->flags & AMDGPU_GEM_USERPTR_READONLY) && (  in amdgpu_gem_userptr_ioctl()
239 	     !(args->flags & AMDGPU_GEM_USERPTR_ANONONLY) ||  in amdgpu_gem_userptr_ioctl()
240 	     !(args->flags & AMDGPU_GEM_USERPTR_REGISTER))) {  in amdgpu_gem_userptr_ioctl()
248 	r = amdgpu_gem_object_create(adev, args->size, 0,  in amdgpu_gem_userptr_ioctl()
255 	r = amdgpu_ttm_tt_set_userptr(bo->tbo.ttm, args->addr, args->flags);  in amdgpu_gem_userptr_ioctl()
259 	if (args->flags & AMDGPU_GEM_USERPTR_REGISTER) {  in amdgpu_gem_userptr_ioctl()
260 		r = amdgpu_mn_register(bo, args->addr);  in amdgpu_gem_userptr_ioctl()
265 	if (args->flags & AMDGPU_GEM_USERPTR_VALIDATE) {  in amdgpu_gem_userptr_ioctl()
287 	args->handle = handle;  in amdgpu_gem_userptr_ioctl()
324 	union drm_amdgpu_gem_mmap *args = data;  in amdgpu_gem_mmap_ioctl()  local
325 	uint32_t handle = args->in.handle;  in amdgpu_gem_mmap_ioctl()
326 	memset(args, 0, sizeof(*args));  in amdgpu_gem_mmap_ioctl()
327 	return amdgpu_mode_dumb_mmap(filp, dev, handle, &args->out.addr_ptr);  in amdgpu_gem_mmap_ioctl()
362 	union drm_amdgpu_gem_wait_idle *args = data;  in amdgpu_gem_wait_idle_ioctl()  local
365 	uint32_t handle = args->in.handle;  in amdgpu_gem_wait_idle_ioctl()
366 	unsigned long timeout = amdgpu_gem_timeout(args->in.timeout);  in amdgpu_gem_wait_idle_ioctl()
385 		memset(args, 0, sizeof(*args));  in amdgpu_gem_wait_idle_ioctl()
386 		args->out.status = (ret == 0);  in amdgpu_gem_wait_idle_ioctl()
398 	struct drm_amdgpu_gem_metadata *args = data;  in amdgpu_gem_metadata_ioctl()  local
403 	DRM_DEBUG("%d \n", args->handle);  in amdgpu_gem_metadata_ioctl()
404 	gobj = drm_gem_object_lookup(dev, filp, args->handle);  in amdgpu_gem_metadata_ioctl()
413 	if (args->op == AMDGPU_GEM_METADATA_OP_GET_METADATA) {  in amdgpu_gem_metadata_ioctl()
414 		amdgpu_bo_get_tiling_flags(robj, &args->data.tiling_info);  in amdgpu_gem_metadata_ioctl()
415 		r = amdgpu_bo_get_metadata(robj, args->data.data,  in amdgpu_gem_metadata_ioctl()
416 					   sizeof(args->data.data),  in amdgpu_gem_metadata_ioctl()
417 					   &args->data.data_size_bytes,  in amdgpu_gem_metadata_ioctl()
418 					   &args->data.flags);  in amdgpu_gem_metadata_ioctl()
419 	} else if (args->op == AMDGPU_GEM_METADATA_OP_SET_METADATA) {  in amdgpu_gem_metadata_ioctl()
420 		if (args->data.data_size_bytes > sizeof(args->data.data)) {  in amdgpu_gem_metadata_ioctl()
424 		r = amdgpu_bo_set_tiling_flags(robj, args->data.tiling_info);  in amdgpu_gem_metadata_ioctl()
426 			r = amdgpu_bo_set_metadata(robj, args->data.data,  in amdgpu_gem_metadata_ioctl()
427 						   args->data.data_size_bytes,  in amdgpu_gem_metadata_ioctl()
428 						   args->data.flags);  in amdgpu_gem_metadata_ioctl()
514 	struct drm_amdgpu_gem_va *args = data;  in amdgpu_gem_va_ioctl()  local
529 	if (args->va_address < AMDGPU_VA_RESERVED_SIZE) {  in amdgpu_gem_va_ioctl()
532 			(unsigned long)args->va_address,  in amdgpu_gem_va_ioctl()
539 	if ((args->flags & invalid_flags)) {  in amdgpu_gem_va_ioctl()
541 			args->flags, invalid_flags);  in amdgpu_gem_va_ioctl()
545 	switch (args->operation) {  in amdgpu_gem_va_ioctl()
551 			args->operation);  in amdgpu_gem_va_ioctl()
555 	gobj = drm_gem_object_lookup(dev, filp, args->handle);  in amdgpu_gem_va_ioctl()
565 	if (args->operation == AMDGPU_VA_OP_MAP) {  in amdgpu_gem_va_ioctl()
583 	switch (args->operation) {  in amdgpu_gem_va_ioctl()
585 		if (args->flags & AMDGPU_VM_PAGE_READABLE)  in amdgpu_gem_va_ioctl()
587 		if (args->flags & AMDGPU_VM_PAGE_WRITEABLE)  in amdgpu_gem_va_ioctl()
589 		if (args->flags & AMDGPU_VM_PAGE_EXECUTABLE)  in amdgpu_gem_va_ioctl()
591 		r = amdgpu_vm_bo_map(adev, bo_va, args->va_address,  in amdgpu_gem_va_ioctl()
592 				     args->offset_in_bo, args->map_size,  in amdgpu_gem_va_ioctl()
596 		r = amdgpu_vm_bo_unmap(adev, bo_va, args->va_address);  in amdgpu_gem_va_ioctl()
602 	if (!r && !(args->flags & AMDGPU_VM_DELAY_UPDATE))  in amdgpu_gem_va_ioctl()
603 		amdgpu_gem_va_update_vm(adev, bo_va, args->operation);  in amdgpu_gem_va_ioctl()
612 	struct drm_amdgpu_gem_op *args = data;  in amdgpu_gem_op_ioctl()  local
617 	gobj = drm_gem_object_lookup(dev, filp, args->handle);  in amdgpu_gem_op_ioctl()
627 	switch (args->op) {  in amdgpu_gem_op_ioctl()
630 		void __user *out = (void __user *)(long)args->value;  in amdgpu_gem_op_ioctl()
647 		robj->initial_domain = args->value & (AMDGPU_GEM_DOMAIN_VRAM |  in amdgpu_gem_op_ioctl()
664 			    struct drm_mode_create_dumb *args)  in amdgpu_mode_dumb_create()  argument
671 	args->pitch = amdgpu_align_pitch(adev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);  in amdgpu_mode_dumb_create()
672 	args->size = (u64)args->pitch * args->height;  in amdgpu_mode_dumb_create()
673 	args->size = ALIGN(args->size, PAGE_SIZE);  in amdgpu_mode_dumb_create()
675 	r = amdgpu_gem_object_create(adev, args->size, 0,  in amdgpu_mode_dumb_create()
689 	args->handle = handle;  in amdgpu_mode_dumb_create()