240 union power_info {  union
285 	union power_info *power_info;  in amdgpu_get_platform_caps()  local
293 	power_info = (union power_info *)(mode_info->atom_context->bios + data_offset);  in amdgpu_get_platform_caps()
295 	adev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps);  in amdgpu_get_platform_caps()
296 	adev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime);  in amdgpu_get_platform_caps()
297 	adev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime);  in amdgpu_get_platform_caps()
315 	union power_info *power_info;  in amdgpu_parse_extended_power_table()  local
326 	power_info = (union power_info *)(mode_info->atom_context->bios + data_offset);  in amdgpu_parse_extended_power_table()
329 	if (le16_to_cpu(power_info->pplib.usTableSize) >=  in amdgpu_parse_extended_power_table()
331 		if (power_info->pplib3.usFanTableOffset) {  in amdgpu_parse_extended_power_table()
333 						      le16_to_cpu(power_info->pplib3.usFanTableOffset));  in amdgpu_parse_extended_power_table()
359 	if (le16_to_cpu(power_info->pplib.usTableSize) >=  in amdgpu_parse_extended_power_table()
361 		if (power_info->pplib4.usVddcDependencyOnSCLKOffset) {  in amdgpu_parse_extended_power_table()
364 				 le16_to_cpu(power_info->pplib4.usVddcDependencyOnSCLKOffset));  in amdgpu_parse_extended_power_table()
372 		if (power_info->pplib4.usVddciDependencyOnMCLKOffset) {  in amdgpu_parse_extended_power_table()
375 				 le16_to_cpu(power_info->pplib4.usVddciDependencyOnMCLKOffset));  in amdgpu_parse_extended_power_table()
383 		if (power_info->pplib4.usVddcDependencyOnMCLKOffset) {  in amdgpu_parse_extended_power_table()
386 				 le16_to_cpu(power_info->pplib4.usVddcDependencyOnMCLKOffset));  in amdgpu_parse_extended_power_table()
394 		if (power_info->pplib4.usMvddDependencyOnMCLKOffset) {  in amdgpu_parse_extended_power_table()
397 				 le16_to_cpu(power_info->pplib4.usMvddDependencyOnMCLKOffset));  in amdgpu_parse_extended_power_table()
405 		if (power_info->pplib4.usMaxClockVoltageOnDCOffset) {  in amdgpu_parse_extended_power_table()
409 				 le16_to_cpu(power_info->pplib4.usMaxClockVoltageOnDCOffset));  in amdgpu_parse_extended_power_table()
423 		if (power_info->pplib4.usVddcPhaseShedLimitsTableOffset) {  in amdgpu_parse_extended_power_table()
427 				 le16_to_cpu(power_info->pplib4.usVddcPhaseShedLimitsTableOffset));  in amdgpu_parse_extended_power_table()
456 	if (le16_to_cpu(power_info->pplib.usTableSize) >=  in amdgpu_parse_extended_power_table()
458 		adev->pm.dpm.tdp_limit = le32_to_cpu(power_info->pplib5.ulTDPLimit);  in amdgpu_parse_extended_power_table()
459 		adev->pm.dpm.near_tdp_limit = le32_to_cpu(power_info->pplib5.ulNearTDPLimit);  in amdgpu_parse_extended_power_table()
461 		adev->pm.dpm.tdp_od_limit = le16_to_cpu(power_info->pplib5.usTDPODLimit);  in amdgpu_parse_extended_power_table()
467 		adev->pm.dpm.sq_ramping_threshold = le32_to_cpu(power_info->pplib5.ulSQRampingThreshold);  in amdgpu_parse_extended_power_table()
468 		adev->pm.dpm.cac_leakage = le32_to_cpu(power_info->pplib5.ulCACLeakage);  in amdgpu_parse_extended_power_table()
469 		adev->pm.dpm.load_line_slope = le16_to_cpu(power_info->pplib5.usLoadLineSlope);  in amdgpu_parse_extended_power_table()
470 		if (power_info->pplib5.usCACLeakageTableOffset) {  in amdgpu_parse_extended_power_table()
474 				 le16_to_cpu(power_info->pplib5.usCACLeakageTableOffset));  in amdgpu_parse_extended_power_table()
505 	if (le16_to_cpu(power_info->pplib.usTableSize) >=  in amdgpu_parse_extended_power_table()
509 			 le16_to_cpu(power_info->pplib3.usExtendendedHeaderOffset));  in amdgpu_parse_extended_power_table()