103 void amdgpu_dpm_print_ps_status(struct amdgpu_device *adev,  in amdgpu_dpm_print_ps_status()  argument
107 	if (rps == adev->pm.dpm.current_ps)  in amdgpu_dpm_print_ps_status()
109 	if (rps == adev->pm.dpm.requested_ps)  in amdgpu_dpm_print_ps_status()
111 	if (rps == adev->pm.dpm.boot_ps)  in amdgpu_dpm_print_ps_status()
116 u32 amdgpu_dpm_get_vblank_time(struct amdgpu_device *adev)  in amdgpu_dpm_get_vblank_time()  argument
118 	struct drm_device *dev = adev->ddev;  in amdgpu_dpm_get_vblank_time()
124 	if (adev->mode_info.num_crtc && adev->mode_info.mode_config_initialized) {  in amdgpu_dpm_get_vblank_time()
142 u32 amdgpu_dpm_get_vrefresh(struct amdgpu_device *adev)  in amdgpu_dpm_get_vrefresh()  argument
144 	struct drm_device *dev = adev->ddev;  in amdgpu_dpm_get_vrefresh()
149 	if (adev->mode_info.num_crtc && adev->mode_info.mode_config_initialized) {  in amdgpu_dpm_get_vrefresh()
282 int amdgpu_get_platform_caps(struct amdgpu_device *adev)  in amdgpu_get_platform_caps()  argument
284 	struct amdgpu_mode_info *mode_info = &adev->mode_info;  in amdgpu_get_platform_caps()
295 	adev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps);  in amdgpu_get_platform_caps()
296 	adev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime);  in amdgpu_get_platform_caps()
297 	adev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime);  in amdgpu_get_platform_caps()
312 int amdgpu_parse_extended_power_table(struct amdgpu_device *adev)  in amdgpu_parse_extended_power_table()  argument
314 	struct amdgpu_mode_info *mode_info = &adev->mode_info;  in amdgpu_parse_extended_power_table()
334 			adev->pm.dpm.fan.t_hyst = fan_info->fan.ucTHyst;  in amdgpu_parse_extended_power_table()
335 			adev->pm.dpm.fan.t_min = le16_to_cpu(fan_info->fan.usTMin);  in amdgpu_parse_extended_power_table()
336 			adev->pm.dpm.fan.t_med = le16_to_cpu(fan_info->fan.usTMed);  in amdgpu_parse_extended_power_table()
337 			adev->pm.dpm.fan.t_high = le16_to_cpu(fan_info->fan.usTHigh);  in amdgpu_parse_extended_power_table()
338 			adev->pm.dpm.fan.pwm_min = le16_to_cpu(fan_info->fan.usPWMMin);  in amdgpu_parse_extended_power_table()
339 			adev->pm.dpm.fan.pwm_med = le16_to_cpu(fan_info->fan.usPWMMed);  in amdgpu_parse_extended_power_table()
340 			adev->pm.dpm.fan.pwm_high = le16_to_cpu(fan_info->fan.usPWMHigh);  in amdgpu_parse_extended_power_table()
342 				adev->pm.dpm.fan.t_max = le16_to_cpu(fan_info->fan2.usTMax);  in amdgpu_parse_extended_power_table()
344 				adev->pm.dpm.fan.t_max = 10900;  in amdgpu_parse_extended_power_table()
345 			adev->pm.dpm.fan.cycle_delay = 100000;  in amdgpu_parse_extended_power_table()
347 				adev->pm.dpm.fan.control_mode = fan_info->fan3.ucFanControlMode;  in amdgpu_parse_extended_power_table()
348 				adev->pm.dpm.fan.default_max_fan_pwm =  in amdgpu_parse_extended_power_table()
350 				adev->pm.dpm.fan.default_fan_output_sensitivity = 4836;  in amdgpu_parse_extended_power_table()
351 				adev->pm.dpm.fan.fan_output_sensitivity =  in amdgpu_parse_extended_power_table()
354 			adev->pm.dpm.fan.ucode_fan_control = true;  in amdgpu_parse_extended_power_table()
365 			ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk,  in amdgpu_parse_extended_power_table()
368 				amdgpu_free_extended_power_table(adev);  in amdgpu_parse_extended_power_table()
376 			ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.vddci_dependency_on_mclk,  in amdgpu_parse_extended_power_table()
379 				amdgpu_free_extended_power_table(adev);  in amdgpu_parse_extended_power_table()
387 			ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.vddc_dependency_on_mclk,  in amdgpu_parse_extended_power_table()
390 				amdgpu_free_extended_power_table(adev);  in amdgpu_parse_extended_power_table()
398 			ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.mvdd_dependency_on_mclk,  in amdgpu_parse_extended_power_table()
401 				amdgpu_free_extended_power_table(adev);  in amdgpu_parse_extended_power_table()
411 				adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk =  in amdgpu_parse_extended_power_table()
414 				adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk =  in amdgpu_parse_extended_power_table()
417 				adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc =  in amdgpu_parse_extended_power_table()
419 				adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddci =  in amdgpu_parse_extended_power_table()
430 			adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries =  in amdgpu_parse_extended_power_table()
434 			if (!adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries) {  in amdgpu_parse_extended_power_table()
435 				amdgpu_free_extended_power_table(adev);  in amdgpu_parse_extended_power_table()
441 				adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].sclk =  in amdgpu_parse_extended_power_table()
443 				adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].mclk =  in amdgpu_parse_extended_power_table()
445 				adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].voltage =  in amdgpu_parse_extended_power_table()
450 			adev->pm.dpm.dyn_state.phase_shedding_limits_table.count =  in amdgpu_parse_extended_power_table()
458 		adev->pm.dpm.tdp_limit = le32_to_cpu(power_info->pplib5.ulTDPLimit);  in amdgpu_parse_extended_power_table()
459 		adev->pm.dpm.near_tdp_limit = le32_to_cpu(power_info->pplib5.ulNearTDPLimit);  in amdgpu_parse_extended_power_table()
460 		adev->pm.dpm.near_tdp_limit_adjusted = adev->pm.dpm.near_tdp_limit;  in amdgpu_parse_extended_power_table()
461 		adev->pm.dpm.tdp_od_limit = le16_to_cpu(power_info->pplib5.usTDPODLimit);  in amdgpu_parse_extended_power_table()
462 		if (adev->pm.dpm.tdp_od_limit)  in amdgpu_parse_extended_power_table()
463 			adev->pm.dpm.power_control = true;  in amdgpu_parse_extended_power_table()
465 			adev->pm.dpm.power_control = false;  in amdgpu_parse_extended_power_table()
466 		adev->pm.dpm.tdp_adjustment = 0;  in amdgpu_parse_extended_power_table()
467 		adev->pm.dpm.sq_ramping_threshold = le32_to_cpu(power_info->pplib5.ulSQRampingThreshold);  in amdgpu_parse_extended_power_table()
468 		adev->pm.dpm.cac_leakage = le32_to_cpu(power_info->pplib5.ulCACLeakage);  in amdgpu_parse_extended_power_table()
469 		adev->pm.dpm.load_line_slope = le16_to_cpu(power_info->pplib5.usLoadLineSlope);  in amdgpu_parse_extended_power_table()
477 			adev->pm.dpm.dyn_state.cac_leakage_table.entries = kzalloc(size, GFP_KERNEL);  in amdgpu_parse_extended_power_table()
478 			if (!adev->pm.dpm.dyn_state.cac_leakage_table.entries) {  in amdgpu_parse_extended_power_table()
479 				amdgpu_free_extended_power_table(adev);  in amdgpu_parse_extended_power_table()
484 				if (adev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_EVV) {  in amdgpu_parse_extended_power_table()
485 					adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc1 =  in amdgpu_parse_extended_power_table()
487 					adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc2 =  in amdgpu_parse_extended_power_table()
489 					adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc3 =  in amdgpu_parse_extended_power_table()
492 					adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc =  in amdgpu_parse_extended_power_table()
494 					adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].leakage =  in amdgpu_parse_extended_power_table()
500 			adev->pm.dpm.dyn_state.cac_leakage_table.count = cac_table->ucNumEntries;  in amdgpu_parse_extended_power_table()
531 			adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries =  in amdgpu_parse_extended_power_table()
533 			if (!adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries) {  in amdgpu_parse_extended_power_table()
534 				amdgpu_free_extended_power_table(adev);  in amdgpu_parse_extended_power_table()
537 			adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count =  in amdgpu_parse_extended_power_table()
545 				adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].evclk =  in amdgpu_parse_extended_power_table()
547 				adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].ecclk =  in amdgpu_parse_extended_power_table()
549 				adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].v =  in amdgpu_parse_extended_power_table()
560 				adev->pm.dpm.vce_states[i].evclk =  in amdgpu_parse_extended_power_table()
562 				adev->pm.dpm.vce_states[i].ecclk =  in amdgpu_parse_extended_power_table()
564 				adev->pm.dpm.vce_states[i].clk_idx =  in amdgpu_parse_extended_power_table()
566 				adev->pm.dpm.vce_states[i].pstate =  in amdgpu_parse_extended_power_table()
585 			adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries =  in amdgpu_parse_extended_power_table()
587 			if (!adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries) {  in amdgpu_parse_extended_power_table()
588 				amdgpu_free_extended_power_table(adev);  in amdgpu_parse_extended_power_table()
591 			adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count =  in amdgpu_parse_extended_power_table()
598 				adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].vclk =  in amdgpu_parse_extended_power_table()
600 				adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].dclk =  in amdgpu_parse_extended_power_table()
602 				adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].v =  in amdgpu_parse_extended_power_table()
617 			adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries =  in amdgpu_parse_extended_power_table()
619 			if (!adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries) {  in amdgpu_parse_extended_power_table()
620 				amdgpu_free_extended_power_table(adev);  in amdgpu_parse_extended_power_table()
623 			adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.count =  in amdgpu_parse_extended_power_table()
627 				adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[i].clk =  in amdgpu_parse_extended_power_table()
629 				adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[i].v =  in amdgpu_parse_extended_power_table()
640 			adev->pm.dpm.dyn_state.ppm_table =  in amdgpu_parse_extended_power_table()
642 			if (!adev->pm.dpm.dyn_state.ppm_table) {  in amdgpu_parse_extended_power_table()
643 				amdgpu_free_extended_power_table(adev);  in amdgpu_parse_extended_power_table()
646 			adev->pm.dpm.dyn_state.ppm_table->ppm_design = ppm->ucPpmDesign;  in amdgpu_parse_extended_power_table()
647 			adev->pm.dpm.dyn_state.ppm_table->cpu_core_number =  in amdgpu_parse_extended_power_table()
649 			adev->pm.dpm.dyn_state.ppm_table->platform_tdp =  in amdgpu_parse_extended_power_table()
651 			adev->pm.dpm.dyn_state.ppm_table->small_ac_platform_tdp =  in amdgpu_parse_extended_power_table()
653 			adev->pm.dpm.dyn_state.ppm_table->platform_tdc =  in amdgpu_parse_extended_power_table()
655 			adev->pm.dpm.dyn_state.ppm_table->small_ac_platform_tdc =  in amdgpu_parse_extended_power_table()
657 			adev->pm.dpm.dyn_state.ppm_table->apu_tdp =  in amdgpu_parse_extended_power_table()
659 			adev->pm.dpm.dyn_state.ppm_table->dgpu_tdp =  in amdgpu_parse_extended_power_table()
661 			adev->pm.dpm.dyn_state.ppm_table->dgpu_ulv_power =  in amdgpu_parse_extended_power_table()
663 			adev->pm.dpm.dyn_state.ppm_table->tj_max =  in amdgpu_parse_extended_power_table()
675 			adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries =  in amdgpu_parse_extended_power_table()
677 			if (!adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries) {  in amdgpu_parse_extended_power_table()
678 				amdgpu_free_extended_power_table(adev);  in amdgpu_parse_extended_power_table()
681 			adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.count =  in amdgpu_parse_extended_power_table()
685 				adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[i].clk =  in amdgpu_parse_extended_power_table()
687 				adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[i].v =  in amdgpu_parse_extended_power_table()
698 			adev->pm.dpm.dyn_state.cac_tdp_table =  in amdgpu_parse_extended_power_table()
700 			if (!adev->pm.dpm.dyn_state.cac_tdp_table) {  in amdgpu_parse_extended_power_table()
701 				amdgpu_free_extended_power_table(adev);  in amdgpu_parse_extended_power_table()
708 				adev->pm.dpm.dyn_state.cac_tdp_table->maximum_power_delivery_limit =  in amdgpu_parse_extended_power_table()
715 				adev->pm.dpm.dyn_state.cac_tdp_table->maximum_power_delivery_limit = 255;  in amdgpu_parse_extended_power_table()
718 			adev->pm.dpm.dyn_state.cac_tdp_table->tdp = le16_to_cpu(pt->usTDP);  in amdgpu_parse_extended_power_table()
719 			adev->pm.dpm.dyn_state.cac_tdp_table->configurable_tdp =  in amdgpu_parse_extended_power_table()
721 			adev->pm.dpm.dyn_state.cac_tdp_table->tdc = le16_to_cpu(pt->usTDC);  in amdgpu_parse_extended_power_table()
722 			adev->pm.dpm.dyn_state.cac_tdp_table->battery_power_limit =  in amdgpu_parse_extended_power_table()
724 			adev->pm.dpm.dyn_state.cac_tdp_table->small_power_limit =  in amdgpu_parse_extended_power_table()
726 			adev->pm.dpm.dyn_state.cac_tdp_table->low_cac_leakage =  in amdgpu_parse_extended_power_table()
728 			adev->pm.dpm.dyn_state.cac_tdp_table->high_cac_leakage =  in amdgpu_parse_extended_power_table()
737 					&adev->pm.dpm.dyn_state.vddgfx_dependency_on_sclk,  in amdgpu_parse_extended_power_table()
740 				kfree(adev->pm.dpm.dyn_state.vddgfx_dependency_on_sclk.entries);  in amdgpu_parse_extended_power_table()
749 void amdgpu_free_extended_power_table(struct amdgpu_device *adev)  in amdgpu_free_extended_power_table()  argument
751 	struct amdgpu_dpm_dynamic_state *dyn_state = &adev->pm.dpm.dyn_state;  in amdgpu_free_extended_power_table()
791 void amdgpu_add_thermal_controller(struct amdgpu_device *adev)  in amdgpu_add_thermal_controller()  argument
793 	struct amdgpu_mode_info *mode_info = &adev->mode_info;  in amdgpu_add_thermal_controller()
811 			adev->pm.no_fan = true;  in amdgpu_add_thermal_controller()
812 		adev->pm.fan_pulses_per_revolution =  in amdgpu_add_thermal_controller()
814 		if (adev->pm.fan_pulses_per_revolution) {  in amdgpu_add_thermal_controller()
815 			adev->pm.fan_min_rpm = controller->ucFanMinRPM;  in amdgpu_add_thermal_controller()
816 			adev->pm.fan_max_rpm = controller->ucFanMaxRPM;  in amdgpu_add_thermal_controller()
822 			adev->pm.int_thermal_type = THERMAL_TYPE_RV6XX;  in amdgpu_add_thermal_controller()
827 			adev->pm.int_thermal_type = THERMAL_TYPE_RV770;  in amdgpu_add_thermal_controller()
832 			adev->pm.int_thermal_type = THERMAL_TYPE_EVERGREEN;  in amdgpu_add_thermal_controller()
837 			adev->pm.int_thermal_type = THERMAL_TYPE_SUMO;  in amdgpu_add_thermal_controller()
842 			adev->pm.int_thermal_type = THERMAL_TYPE_NI;  in amdgpu_add_thermal_controller()
847 			adev->pm.int_thermal_type = THERMAL_TYPE_SI;  in amdgpu_add_thermal_controller()
852 			adev->pm.int_thermal_type = THERMAL_TYPE_CI;  in amdgpu_add_thermal_controller()
857 			adev->pm.int_thermal_type = THERMAL_TYPE_KV;  in amdgpu_add_thermal_controller()
862 			adev->pm.int_thermal_type = THERMAL_TYPE_EXTERNAL_GPIO;  in amdgpu_add_thermal_controller()
868 			adev->pm.int_thermal_type = THERMAL_TYPE_ADT7473_WITH_INTERNAL;  in amdgpu_add_thermal_controller()
874 			adev->pm.int_thermal_type = THERMAL_TYPE_EMC2103_WITH_INTERNAL;  in amdgpu_add_thermal_controller()
881 			adev->pm.int_thermal_type = THERMAL_TYPE_EXTERNAL;  in amdgpu_add_thermal_controller()
882 			i2c_bus = amdgpu_atombios_lookup_i2c_gpio(adev, controller->ucI2cLine);  in amdgpu_add_thermal_controller()
883 			adev->pm.i2c_bus = amdgpu_i2c_lookup(adev, &i2c_bus);  in amdgpu_add_thermal_controller()
884 			if (adev->pm.i2c_bus) {  in amdgpu_add_thermal_controller()
889 				i2c_new_device(&adev->pm.i2c_bus->adapter, &info);  in amdgpu_add_thermal_controller()
901 enum amdgpu_pcie_gen amdgpu_get_pcie_gen_support(struct amdgpu_device *adev,  in amdgpu_get_pcie_gen_support()  argument
924 u16 amdgpu_get_pcie_lane_support(struct amdgpu_device *adev,  in amdgpu_get_pcie_lane_support()  argument