Lines Matching refs:adev
47 static int amdgpu_debugfs_regs_init(struct amdgpu_device *adev);
48 static void amdgpu_debugfs_regs_cleanup(struct amdgpu_device *adev);
66 struct amdgpu_device *adev = dev->dev_private; in amdgpu_device_is_px() local
68 if (adev->flags & AMD_IS_PX) in amdgpu_device_is_px()
76 uint32_t amdgpu_mm_rreg(struct amdgpu_device *adev, uint32_t reg, in amdgpu_mm_rreg() argument
79 if ((reg * 4) < adev->rmmio_size && !always_indirect) in amdgpu_mm_rreg()
80 return readl(((void __iomem *)adev->rmmio) + (reg * 4)); in amdgpu_mm_rreg()
85 spin_lock_irqsave(&adev->mmio_idx_lock, flags); in amdgpu_mm_rreg()
86 writel((reg * 4), ((void __iomem *)adev->rmmio) + (mmMM_INDEX * 4)); in amdgpu_mm_rreg()
87 ret = readl(((void __iomem *)adev->rmmio) + (mmMM_DATA * 4)); in amdgpu_mm_rreg()
88 spin_unlock_irqrestore(&adev->mmio_idx_lock, flags); in amdgpu_mm_rreg()
94 void amdgpu_mm_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v, in amdgpu_mm_wreg() argument
97 if ((reg * 4) < adev->rmmio_size && !always_indirect) in amdgpu_mm_wreg()
98 writel(v, ((void __iomem *)adev->rmmio) + (reg * 4)); in amdgpu_mm_wreg()
102 spin_lock_irqsave(&adev->mmio_idx_lock, flags); in amdgpu_mm_wreg()
103 writel((reg * 4), ((void __iomem *)adev->rmmio) + (mmMM_INDEX * 4)); in amdgpu_mm_wreg()
104 writel(v, ((void __iomem *)adev->rmmio) + (mmMM_DATA * 4)); in amdgpu_mm_wreg()
105 spin_unlock_irqrestore(&adev->mmio_idx_lock, flags); in amdgpu_mm_wreg()
109 u32 amdgpu_io_rreg(struct amdgpu_device *adev, u32 reg) in amdgpu_io_rreg() argument
111 if ((reg * 4) < adev->rio_mem_size) in amdgpu_io_rreg()
112 return ioread32(adev->rio_mem + (reg * 4)); in amdgpu_io_rreg()
114 iowrite32((reg * 4), adev->rio_mem + (mmMM_INDEX * 4)); in amdgpu_io_rreg()
115 return ioread32(adev->rio_mem + (mmMM_DATA * 4)); in amdgpu_io_rreg()
119 void amdgpu_io_wreg(struct amdgpu_device *adev, u32 reg, u32 v) in amdgpu_io_wreg() argument
122 if ((reg * 4) < adev->rio_mem_size) in amdgpu_io_wreg()
123 iowrite32(v, adev->rio_mem + (reg * 4)); in amdgpu_io_wreg()
125 iowrite32((reg * 4), adev->rio_mem + (mmMM_INDEX * 4)); in amdgpu_io_wreg()
126 iowrite32(v, adev->rio_mem + (mmMM_DATA * 4)); in amdgpu_io_wreg()
139 u32 amdgpu_mm_rdoorbell(struct amdgpu_device *adev, u32 index) in amdgpu_mm_rdoorbell() argument
141 if (index < adev->doorbell.num_doorbells) { in amdgpu_mm_rdoorbell()
142 return readl(adev->doorbell.ptr + index); in amdgpu_mm_rdoorbell()
159 void amdgpu_mm_wdoorbell(struct amdgpu_device *adev, u32 index, u32 v) in amdgpu_mm_wdoorbell() argument
161 if (index < adev->doorbell.num_doorbells) { in amdgpu_mm_wdoorbell()
162 writel(v, adev->doorbell.ptr + index); in amdgpu_mm_wdoorbell()
178 static uint32_t amdgpu_invalid_rreg(struct amdgpu_device *adev, uint32_t reg) in amdgpu_invalid_rreg() argument
195 static void amdgpu_invalid_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v) in amdgpu_invalid_wreg() argument
213 static uint32_t amdgpu_block_invalid_rreg(struct amdgpu_device *adev, in amdgpu_block_invalid_rreg() argument
233 static void amdgpu_block_invalid_wreg(struct amdgpu_device *adev, in amdgpu_block_invalid_wreg() argument
242 static int amdgpu_vram_scratch_init(struct amdgpu_device *adev) in amdgpu_vram_scratch_init() argument
246 if (adev->vram_scratch.robj == NULL) { in amdgpu_vram_scratch_init()
247 r = amdgpu_bo_create(adev, AMDGPU_GPU_PAGE_SIZE, in amdgpu_vram_scratch_init()
250 NULL, NULL, &adev->vram_scratch.robj); in amdgpu_vram_scratch_init()
256 r = amdgpu_bo_reserve(adev->vram_scratch.robj, false); in amdgpu_vram_scratch_init()
259 r = amdgpu_bo_pin(adev->vram_scratch.robj, in amdgpu_vram_scratch_init()
260 AMDGPU_GEM_DOMAIN_VRAM, &adev->vram_scratch.gpu_addr); in amdgpu_vram_scratch_init()
262 amdgpu_bo_unreserve(adev->vram_scratch.robj); in amdgpu_vram_scratch_init()
265 r = amdgpu_bo_kmap(adev->vram_scratch.robj, in amdgpu_vram_scratch_init()
266 (void **)&adev->vram_scratch.ptr); in amdgpu_vram_scratch_init()
268 amdgpu_bo_unpin(adev->vram_scratch.robj); in amdgpu_vram_scratch_init()
269 amdgpu_bo_unreserve(adev->vram_scratch.robj); in amdgpu_vram_scratch_init()
274 static void amdgpu_vram_scratch_fini(struct amdgpu_device *adev) in amdgpu_vram_scratch_fini() argument
278 if (adev->vram_scratch.robj == NULL) { in amdgpu_vram_scratch_fini()
281 r = amdgpu_bo_reserve(adev->vram_scratch.robj, false); in amdgpu_vram_scratch_fini()
283 amdgpu_bo_kunmap(adev->vram_scratch.robj); in amdgpu_vram_scratch_fini()
284 amdgpu_bo_unpin(adev->vram_scratch.robj); in amdgpu_vram_scratch_fini()
285 amdgpu_bo_unreserve(adev->vram_scratch.robj); in amdgpu_vram_scratch_fini()
287 amdgpu_bo_unref(&adev->vram_scratch.robj); in amdgpu_vram_scratch_fini()
300 void amdgpu_program_register_sequence(struct amdgpu_device *adev, in amdgpu_program_register_sequence() argument
326 void amdgpu_pci_config_reset(struct amdgpu_device *adev) in amdgpu_pci_config_reset() argument
328 pci_write_config_dword(adev->pdev, 0x7c, AMDGPU_ASIC_RESET_DATA); in amdgpu_pci_config_reset()
342 static int amdgpu_doorbell_init(struct amdgpu_device *adev) in amdgpu_doorbell_init() argument
345 adev->doorbell.base = pci_resource_start(adev->pdev, 2); in amdgpu_doorbell_init()
346 adev->doorbell.size = pci_resource_len(adev->pdev, 2); in amdgpu_doorbell_init()
348 adev->doorbell.num_doorbells = min_t(u32, adev->doorbell.size / sizeof(u32), in amdgpu_doorbell_init()
350 if (adev->doorbell.num_doorbells == 0) in amdgpu_doorbell_init()
353 adev->doorbell.ptr = ioremap(adev->doorbell.base, adev->doorbell.num_doorbells * sizeof(u32)); in amdgpu_doorbell_init()
354 if (adev->doorbell.ptr == NULL) { in amdgpu_doorbell_init()
357 DRM_INFO("doorbell mmio base: 0x%08X\n", (uint32_t)adev->doorbell.base); in amdgpu_doorbell_init()
358 DRM_INFO("doorbell mmio size: %u\n", (unsigned)adev->doorbell.size); in amdgpu_doorbell_init()
370 static void amdgpu_doorbell_fini(struct amdgpu_device *adev) in amdgpu_doorbell_fini() argument
372 iounmap(adev->doorbell.ptr); in amdgpu_doorbell_fini()
373 adev->doorbell.ptr = NULL; in amdgpu_doorbell_fini()
389 void amdgpu_doorbell_get_kfd_info(struct amdgpu_device *adev, in amdgpu_doorbell_get_kfd_info() argument
398 if (adev->doorbell.size > adev->doorbell.num_doorbells * sizeof(u32)) { in amdgpu_doorbell_get_kfd_info()
399 *aperture_base = adev->doorbell.base; in amdgpu_doorbell_get_kfd_info()
400 *aperture_size = adev->doorbell.size; in amdgpu_doorbell_get_kfd_info()
401 *start_offset = adev->doorbell.num_doorbells * sizeof(u32); in amdgpu_doorbell_get_kfd_info()
424 static void amdgpu_wb_fini(struct amdgpu_device *adev) in amdgpu_wb_fini() argument
426 if (adev->wb.wb_obj) { in amdgpu_wb_fini()
427 if (!amdgpu_bo_reserve(adev->wb.wb_obj, false)) { in amdgpu_wb_fini()
428 amdgpu_bo_kunmap(adev->wb.wb_obj); in amdgpu_wb_fini()
429 amdgpu_bo_unpin(adev->wb.wb_obj); in amdgpu_wb_fini()
430 amdgpu_bo_unreserve(adev->wb.wb_obj); in amdgpu_wb_fini()
432 amdgpu_bo_unref(&adev->wb.wb_obj); in amdgpu_wb_fini()
433 adev->wb.wb = NULL; in amdgpu_wb_fini()
434 adev->wb.wb_obj = NULL; in amdgpu_wb_fini()
447 static int amdgpu_wb_init(struct amdgpu_device *adev) in amdgpu_wb_init() argument
451 if (adev->wb.wb_obj == NULL) { in amdgpu_wb_init()
452 r = amdgpu_bo_create(adev, AMDGPU_MAX_WB * 4, PAGE_SIZE, true, in amdgpu_wb_init()
454 &adev->wb.wb_obj); in amdgpu_wb_init()
456 dev_warn(adev->dev, "(%d) create WB bo failed\n", r); in amdgpu_wb_init()
459 r = amdgpu_bo_reserve(adev->wb.wb_obj, false); in amdgpu_wb_init()
461 amdgpu_wb_fini(adev); in amdgpu_wb_init()
464 r = amdgpu_bo_pin(adev->wb.wb_obj, AMDGPU_GEM_DOMAIN_GTT, in amdgpu_wb_init()
465 &adev->wb.gpu_addr); in amdgpu_wb_init()
467 amdgpu_bo_unreserve(adev->wb.wb_obj); in amdgpu_wb_init()
468 dev_warn(adev->dev, "(%d) pin WB bo failed\n", r); in amdgpu_wb_init()
469 amdgpu_wb_fini(adev); in amdgpu_wb_init()
472 r = amdgpu_bo_kmap(adev->wb.wb_obj, (void **)&adev->wb.wb); in amdgpu_wb_init()
473 amdgpu_bo_unreserve(adev->wb.wb_obj); in amdgpu_wb_init()
475 dev_warn(adev->dev, "(%d) map WB bo failed\n", r); in amdgpu_wb_init()
476 amdgpu_wb_fini(adev); in amdgpu_wb_init()
480 adev->wb.num_wb = AMDGPU_MAX_WB; in amdgpu_wb_init()
481 memset(&adev->wb.used, 0, sizeof(adev->wb.used)); in amdgpu_wb_init()
484 memset((char *)adev->wb.wb, 0, AMDGPU_GPU_PAGE_SIZE); in amdgpu_wb_init()
499 int amdgpu_wb_get(struct amdgpu_device *adev, u32 *wb) in amdgpu_wb_get() argument
501 unsigned long offset = find_first_zero_bit(adev->wb.used, adev->wb.num_wb); in amdgpu_wb_get()
502 if (offset < adev->wb.num_wb) { in amdgpu_wb_get()
503 __set_bit(offset, adev->wb.used); in amdgpu_wb_get()
519 void amdgpu_wb_free(struct amdgpu_device *adev, u32 wb) in amdgpu_wb_free() argument
521 if (wb < adev->wb.num_wb) in amdgpu_wb_free()
522 __clear_bit(wb, adev->wb.used); in amdgpu_wb_free()
557 void amdgpu_vram_location(struct amdgpu_device *adev, struct amdgpu_mc *mc, u64 base) in amdgpu_vram_location() argument
562 if (mc->mc_vram_size > (adev->mc.mc_mask - base + 1)) { in amdgpu_vram_location()
563 dev_warn(adev->dev, "limiting VRAM to PCI aperture size\n"); in amdgpu_vram_location()
570 dev_info(adev->dev, "VRAM: %lluM 0x%016llX - 0x%016llX (%lluM used)\n", in amdgpu_vram_location()
587 void amdgpu_gtt_location(struct amdgpu_device *adev, struct amdgpu_mc *mc) in amdgpu_gtt_location() argument
591 size_af = ((adev->mc.mc_mask - mc->vram_end) + mc->gtt_base_align) & ~mc->gtt_base_align; in amdgpu_gtt_location()
595 dev_warn(adev->dev, "limiting GTT\n"); in amdgpu_gtt_location()
601 dev_warn(adev->dev, "limiting GTT\n"); in amdgpu_gtt_location()
607 dev_info(adev->dev, "GTT: %lluM 0x%016llX - 0x%016llX\n", in amdgpu_gtt_location()
623 bool amdgpu_card_posted(struct amdgpu_device *adev) in amdgpu_card_posted() argument
646 bool amdgpu_boot_test_post_card(struct amdgpu_device *adev) in amdgpu_boot_test_post_card() argument
648 if (amdgpu_card_posted(adev)) in amdgpu_boot_test_post_card()
651 if (adev->bios) { in amdgpu_boot_test_post_card()
653 if (adev->is_atom_bios) in amdgpu_boot_test_post_card()
654 amdgpu_atom_asic_init(adev->mode_info.atom_context); in amdgpu_boot_test_post_card()
657 dev_err(adev->dev, "Card not posted and no BIOS - ignoring\n"); in amdgpu_boot_test_post_card()
672 int amdgpu_dummy_page_init(struct amdgpu_device *adev) in amdgpu_dummy_page_init() argument
674 if (adev->dummy_page.page) in amdgpu_dummy_page_init()
676 adev->dummy_page.page = alloc_page(GFP_DMA32 | GFP_KERNEL | __GFP_ZERO); in amdgpu_dummy_page_init()
677 if (adev->dummy_page.page == NULL) in amdgpu_dummy_page_init()
679 adev->dummy_page.addr = pci_map_page(adev->pdev, adev->dummy_page.page, in amdgpu_dummy_page_init()
681 if (pci_dma_mapping_error(adev->pdev, adev->dummy_page.addr)) { in amdgpu_dummy_page_init()
682 dev_err(&adev->pdev->dev, "Failed to DMA MAP the dummy page\n"); in amdgpu_dummy_page_init()
683 __free_page(adev->dummy_page.page); in amdgpu_dummy_page_init()
684 adev->dummy_page.page = NULL; in amdgpu_dummy_page_init()
697 void amdgpu_dummy_page_fini(struct amdgpu_device *adev) in amdgpu_dummy_page_fini() argument
699 if (adev->dummy_page.page == NULL) in amdgpu_dummy_page_fini()
701 pci_unmap_page(adev->pdev, adev->dummy_page.addr, in amdgpu_dummy_page_fini()
703 __free_page(adev->dummy_page.page); in amdgpu_dummy_page_fini()
704 adev->dummy_page.page = NULL; in amdgpu_dummy_page_fini()
784 struct amdgpu_device *adev = info->dev->dev_private; in cail_reg_write() local
800 struct amdgpu_device *adev = info->dev->dev_private; in cail_reg_read() local
818 struct amdgpu_device *adev = info->dev->dev_private; in cail_ioreg_write() local
834 struct amdgpu_device *adev = info->dev->dev_private; in cail_ioreg_read() local
850 static void amdgpu_atombios_fini(struct amdgpu_device *adev) in amdgpu_atombios_fini() argument
852 if (adev->mode_info.atom_context) in amdgpu_atombios_fini()
853 kfree(adev->mode_info.atom_context->scratch); in amdgpu_atombios_fini()
854 kfree(adev->mode_info.atom_context); in amdgpu_atombios_fini()
855 adev->mode_info.atom_context = NULL; in amdgpu_atombios_fini()
856 kfree(adev->mode_info.atom_card_info); in amdgpu_atombios_fini()
857 adev->mode_info.atom_card_info = NULL; in amdgpu_atombios_fini()
870 static int amdgpu_atombios_init(struct amdgpu_device *adev) in amdgpu_atombios_init() argument
878 adev->mode_info.atom_card_info = atom_card_info; in amdgpu_atombios_init()
879 atom_card_info->dev = adev->ddev; in amdgpu_atombios_init()
883 if (adev->rio_mem) { in amdgpu_atombios_init()
896 adev->mode_info.atom_context = amdgpu_atom_parse(atom_card_info, adev->bios); in amdgpu_atombios_init()
897 if (!adev->mode_info.atom_context) { in amdgpu_atombios_init()
898 amdgpu_atombios_fini(adev); in amdgpu_atombios_init()
902 mutex_init(&adev->mode_info.atom_context->mutex); in amdgpu_atombios_init()
903 amdgpu_atombios_scratch_regs_init(adev); in amdgpu_atombios_init()
904 amdgpu_atom_allocate_fb_scratch(adev->mode_info.atom_context); in amdgpu_atombios_init()
920 struct amdgpu_device *adev = cookie; in amdgpu_vga_set_decode() local
921 amdgpu_asic_set_vga_state(adev, state); in amdgpu_vga_set_decode()
950 static void amdgpu_check_arguments(struct amdgpu_device *adev) in amdgpu_check_arguments() argument
954 dev_warn(adev->dev, "vram limit (%d) must be a power of 2\n", in amdgpu_check_arguments()
962 dev_warn(adev->dev, "gart size (%d) too small\n", in amdgpu_check_arguments()
966 dev_warn(adev->dev, "gart size (%d) must be a power of 2\n", in amdgpu_check_arguments()
973 dev_warn(adev->dev, "VM size (%d) must be a power of 2\n", in amdgpu_check_arguments()
979 dev_warn(adev->dev, "VM size (%d) too small, min is 1GB\n", in amdgpu_check_arguments()
988 dev_warn(adev->dev, "VM size (%d) too large, max is 1TB\n", in amdgpu_check_arguments()
1009 dev_warn(adev->dev, "VM page table size (%d) too small\n", in amdgpu_check_arguments()
1016 dev_warn(adev->dev, "VM page table size (%d) too large\n", in amdgpu_check_arguments()
1087 int amdgpu_set_clockgating_state(struct amdgpu_device *adev, in amdgpu_set_clockgating_state() argument
1093 for (i = 0; i < adev->num_ip_blocks; i++) { in amdgpu_set_clockgating_state()
1094 if (adev->ip_blocks[i].type == block_type) { in amdgpu_set_clockgating_state()
1095 r = adev->ip_blocks[i].funcs->set_clockgating_state((void *)adev, in amdgpu_set_clockgating_state()
1104 int amdgpu_set_powergating_state(struct amdgpu_device *adev, in amdgpu_set_powergating_state() argument
1110 for (i = 0; i < adev->num_ip_blocks; i++) { in amdgpu_set_powergating_state()
1111 if (adev->ip_blocks[i].type == block_type) { in amdgpu_set_powergating_state()
1112 r = adev->ip_blocks[i].funcs->set_powergating_state((void *)adev, in amdgpu_set_powergating_state()
1122 struct amdgpu_device *adev, in amdgpu_get_ip_block() argument
1127 for (i = 0; i < adev->num_ip_blocks; i++) in amdgpu_get_ip_block()
1128 if (adev->ip_blocks[i].type == type) in amdgpu_get_ip_block()
1129 return &adev->ip_blocks[i]; in amdgpu_get_ip_block()
1145 int amdgpu_ip_block_version_cmp(struct amdgpu_device *adev, in amdgpu_ip_block_version_cmp() argument
1150 ip_block = amdgpu_get_ip_block(adev, type); in amdgpu_ip_block_version_cmp()
1160 static int amdgpu_early_init(struct amdgpu_device *adev) in amdgpu_early_init() argument
1164 switch (adev->asic_type) { in amdgpu_early_init()
1170 if (adev->asic_type == CHIP_CARRIZO || adev->asic_type == CHIP_STONEY) in amdgpu_early_init()
1171 adev->family = AMDGPU_FAMILY_CZ; in amdgpu_early_init()
1173 adev->family = AMDGPU_FAMILY_VI; in amdgpu_early_init()
1175 r = vi_set_ip_blocks(adev); in amdgpu_early_init()
1185 if ((adev->asic_type == CHIP_BONAIRE) || (adev->asic_type == CHIP_HAWAII)) in amdgpu_early_init()
1186 adev->family = AMDGPU_FAMILY_CI; in amdgpu_early_init()
1188 adev->family = AMDGPU_FAMILY_KV; in amdgpu_early_init()
1190 r = cik_set_ip_blocks(adev); in amdgpu_early_init()
1200 adev->ip_block_status = kcalloc(adev->num_ip_blocks, in amdgpu_early_init()
1202 if (adev->ip_block_status == NULL) in amdgpu_early_init()
1205 if (adev->ip_blocks == NULL) { in amdgpu_early_init()
1210 for (i = 0; i < adev->num_ip_blocks; i++) { in amdgpu_early_init()
1213 adev->ip_block_status[i].valid = false; in amdgpu_early_init()
1215 if (adev->ip_blocks[i].funcs->early_init) { in amdgpu_early_init()
1216 r = adev->ip_blocks[i].funcs->early_init((void *)adev); in amdgpu_early_init()
1218 adev->ip_block_status[i].valid = false; in amdgpu_early_init()
1222 adev->ip_block_status[i].valid = true; in amdgpu_early_init()
1224 adev->ip_block_status[i].valid = true; in amdgpu_early_init()
1232 static int amdgpu_init(struct amdgpu_device *adev) in amdgpu_init() argument
1236 for (i = 0; i < adev->num_ip_blocks; i++) { in amdgpu_init()
1237 if (!adev->ip_block_status[i].valid) in amdgpu_init()
1239 r = adev->ip_blocks[i].funcs->sw_init((void *)adev); in amdgpu_init()
1242 adev->ip_block_status[i].sw = true; in amdgpu_init()
1244 if (adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_GMC) { in amdgpu_init()
1245 r = amdgpu_vram_scratch_init(adev); in amdgpu_init()
1248 r = adev->ip_blocks[i].funcs->hw_init((void *)adev); in amdgpu_init()
1251 r = amdgpu_wb_init(adev); in amdgpu_init()
1254 adev->ip_block_status[i].hw = true; in amdgpu_init()
1258 for (i = 0; i < adev->num_ip_blocks; i++) { in amdgpu_init()
1259 if (!adev->ip_block_status[i].sw) in amdgpu_init()
1262 if (adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_GMC) in amdgpu_init()
1264 r = adev->ip_blocks[i].funcs->hw_init((void *)adev); in amdgpu_init()
1267 adev->ip_block_status[i].hw = true; in amdgpu_init()
1273 static int amdgpu_late_init(struct amdgpu_device *adev) in amdgpu_late_init() argument
1277 for (i = 0; i < adev->num_ip_blocks; i++) { in amdgpu_late_init()
1278 if (!adev->ip_block_status[i].valid) in amdgpu_late_init()
1281 r = adev->ip_blocks[i].funcs->set_clockgating_state((void *)adev, in amdgpu_late_init()
1285 if (adev->ip_blocks[i].funcs->late_init) { in amdgpu_late_init()
1286 r = adev->ip_blocks[i].funcs->late_init((void *)adev); in amdgpu_late_init()
1295 static int amdgpu_fini(struct amdgpu_device *adev) in amdgpu_fini() argument
1299 for (i = adev->num_ip_blocks - 1; i >= 0; i--) { in amdgpu_fini()
1300 if (!adev->ip_block_status[i].hw) in amdgpu_fini()
1302 if (adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_GMC) { in amdgpu_fini()
1303 amdgpu_wb_fini(adev); in amdgpu_fini()
1304 amdgpu_vram_scratch_fini(adev); in amdgpu_fini()
1307 r = adev->ip_blocks[i].funcs->set_clockgating_state((void *)adev, in amdgpu_fini()
1311 r = adev->ip_blocks[i].funcs->hw_fini((void *)adev); in amdgpu_fini()
1313 adev->ip_block_status[i].hw = false; in amdgpu_fini()
1316 for (i = adev->num_ip_blocks - 1; i >= 0; i--) { in amdgpu_fini()
1317 if (!adev->ip_block_status[i].sw) in amdgpu_fini()
1319 r = adev->ip_blocks[i].funcs->sw_fini((void *)adev); in amdgpu_fini()
1321 adev->ip_block_status[i].sw = false; in amdgpu_fini()
1322 adev->ip_block_status[i].valid = false; in amdgpu_fini()
1328 static int amdgpu_suspend(struct amdgpu_device *adev) in amdgpu_suspend() argument
1332 for (i = adev->num_ip_blocks - 1; i >= 0; i--) { in amdgpu_suspend()
1333 if (!adev->ip_block_status[i].valid) in amdgpu_suspend()
1336 r = adev->ip_blocks[i].funcs->set_clockgating_state((void *)adev, in amdgpu_suspend()
1339 r = adev->ip_blocks[i].funcs->suspend(adev); in amdgpu_suspend()
1346 static int amdgpu_resume(struct amdgpu_device *adev) in amdgpu_resume() argument
1350 for (i = 0; i < adev->num_ip_blocks; i++) { in amdgpu_resume()
1351 if (!adev->ip_block_status[i].valid) in amdgpu_resume()
1353 r = adev->ip_blocks[i].funcs->resume(adev); in amdgpu_resume()
1373 int amdgpu_device_init(struct amdgpu_device *adev, in amdgpu_device_init() argument
1381 adev->shutdown = false; in amdgpu_device_init()
1382 adev->dev = &pdev->dev; in amdgpu_device_init()
1383 adev->ddev = ddev; in amdgpu_device_init()
1384 adev->pdev = pdev; in amdgpu_device_init()
1385 adev->flags = flags; in amdgpu_device_init()
1386 adev->asic_type = flags & AMD_ASIC_MASK; in amdgpu_device_init()
1387 adev->is_atom_bios = false; in amdgpu_device_init()
1388 adev->usec_timeout = AMDGPU_MAX_USEC_TIMEOUT; in amdgpu_device_init()
1389 adev->mc.gtt_size = 512 * 1024 * 1024; in amdgpu_device_init()
1390 adev->accel_working = false; in amdgpu_device_init()
1391 adev->num_rings = 0; in amdgpu_device_init()
1392 adev->mman.buffer_funcs = NULL; in amdgpu_device_init()
1393 adev->mman.buffer_funcs_ring = NULL; in amdgpu_device_init()
1394 adev->vm_manager.vm_pte_funcs = NULL; in amdgpu_device_init()
1395 adev->vm_manager.vm_pte_funcs_ring = NULL; in amdgpu_device_init()
1396 adev->gart.gart_funcs = NULL; in amdgpu_device_init()
1397 adev->fence_context = fence_context_alloc(AMDGPU_MAX_RINGS); in amdgpu_device_init()
1399 adev->smc_rreg = &amdgpu_invalid_rreg; in amdgpu_device_init()
1400 adev->smc_wreg = &amdgpu_invalid_wreg; in amdgpu_device_init()
1401 adev->pcie_rreg = &amdgpu_invalid_rreg; in amdgpu_device_init()
1402 adev->pcie_wreg = &amdgpu_invalid_wreg; in amdgpu_device_init()
1403 adev->uvd_ctx_rreg = &amdgpu_invalid_rreg; in amdgpu_device_init()
1404 adev->uvd_ctx_wreg = &amdgpu_invalid_wreg; in amdgpu_device_init()
1405 adev->didt_rreg = &amdgpu_invalid_rreg; in amdgpu_device_init()
1406 adev->didt_wreg = &amdgpu_invalid_wreg; in amdgpu_device_init()
1407 adev->audio_endpt_rreg = &amdgpu_block_invalid_rreg; in amdgpu_device_init()
1408 adev->audio_endpt_wreg = &amdgpu_block_invalid_wreg; in amdgpu_device_init()
1411 amdgpu_asic_name[adev->asic_type], pdev->vendor, pdev->device, in amdgpu_device_init()
1416 mutex_init(&adev->ring_lock); in amdgpu_device_init()
1417 atomic_set(&adev->irq.ih.lock, 0); in amdgpu_device_init()
1418 mutex_init(&adev->gem.mutex); in amdgpu_device_init()
1419 mutex_init(&adev->pm.mutex); in amdgpu_device_init()
1420 mutex_init(&adev->gfx.gpu_clock_mutex); in amdgpu_device_init()
1421 mutex_init(&adev->srbm_mutex); in amdgpu_device_init()
1422 mutex_init(&adev->grbm_idx_mutex); in amdgpu_device_init()
1423 mutex_init(&adev->mn_lock); in amdgpu_device_init()
1424 hash_init(adev->mn_hash); in amdgpu_device_init()
1426 amdgpu_check_arguments(adev); in amdgpu_device_init()
1430 spin_lock_init(&adev->mmio_idx_lock); in amdgpu_device_init()
1431 spin_lock_init(&adev->smc_idx_lock); in amdgpu_device_init()
1432 spin_lock_init(&adev->pcie_idx_lock); in amdgpu_device_init()
1433 spin_lock_init(&adev->uvd_ctx_idx_lock); in amdgpu_device_init()
1434 spin_lock_init(&adev->didt_idx_lock); in amdgpu_device_init()
1435 spin_lock_init(&adev->audio_endpt_idx_lock); in amdgpu_device_init()
1437 adev->rmmio_base = pci_resource_start(adev->pdev, 5); in amdgpu_device_init()
1438 adev->rmmio_size = pci_resource_len(adev->pdev, 5); in amdgpu_device_init()
1439 adev->rmmio = ioremap(adev->rmmio_base, adev->rmmio_size); in amdgpu_device_init()
1440 if (adev->rmmio == NULL) { in amdgpu_device_init()
1443 DRM_INFO("register mmio base: 0x%08X\n", (uint32_t)adev->rmmio_base); in amdgpu_device_init()
1444 DRM_INFO("register mmio size: %u\n", (unsigned)adev->rmmio_size); in amdgpu_device_init()
1447 amdgpu_doorbell_init(adev); in amdgpu_device_init()
1451 if (pci_resource_flags(adev->pdev, i) & IORESOURCE_IO) { in amdgpu_device_init()
1452 adev->rio_mem_size = pci_resource_len(adev->pdev, i); in amdgpu_device_init()
1453 adev->rio_mem = pci_iomap(adev->pdev, i, adev->rio_mem_size); in amdgpu_device_init()
1457 if (adev->rio_mem == NULL) in amdgpu_device_init()
1461 r = amdgpu_early_init(adev); in amdgpu_device_init()
1468 vga_client_register(adev->pdev, adev, NULL, amdgpu_vga_set_decode); in amdgpu_device_init()
1474 vga_switcheroo_register_client(adev->pdev, &amdgpu_switcheroo_ops, runtime); in amdgpu_device_init()
1476 vga_switcheroo_init_domain_pm_ops(adev->dev, &adev->vga_pm_domain); in amdgpu_device_init()
1479 if (!amdgpu_get_bios(adev)) in amdgpu_device_init()
1482 if (!adev->is_atom_bios) { in amdgpu_device_init()
1483 dev_err(adev->dev, "Expecting atombios for GPU\n"); in amdgpu_device_init()
1486 r = amdgpu_atombios_init(adev); in amdgpu_device_init()
1491 if (!amdgpu_card_posted(adev)) { in amdgpu_device_init()
1492 if (!adev->bios) { in amdgpu_device_init()
1493 dev_err(adev->dev, "Card not posted and no BIOS - ignoring\n"); in amdgpu_device_init()
1497 amdgpu_atom_asic_init(adev->mode_info.atom_context); in amdgpu_device_init()
1501 r = amdgpu_atombios_get_clock_info(adev); in amdgpu_device_init()
1505 amdgpu_atombios_i2c_init(adev); in amdgpu_device_init()
1508 r = amdgpu_fence_driver_init(adev); in amdgpu_device_init()
1513 drm_mode_config_init(adev->ddev); in amdgpu_device_init()
1515 r = amdgpu_init(adev); in amdgpu_device_init()
1517 amdgpu_fini(adev); in amdgpu_device_init()
1521 adev->accel_working = true; in amdgpu_device_init()
1523 amdgpu_fbdev_init(adev); in amdgpu_device_init()
1525 r = amdgpu_ib_pool_init(adev); in amdgpu_device_init()
1527 dev_err(adev->dev, "IB initialization failed (%d).\n", r); in amdgpu_device_init()
1531 r = amdgpu_ctx_init(adev, true, &adev->kernel_ctx); in amdgpu_device_init()
1533 dev_err(adev->dev, "failed to create kernel context (%d).\n", r); in amdgpu_device_init()
1536 r = amdgpu_ib_ring_tests(adev); in amdgpu_device_init()
1540 r = amdgpu_gem_debugfs_init(adev); in amdgpu_device_init()
1545 r = amdgpu_debugfs_regs_init(adev); in amdgpu_device_init()
1551 if (adev->accel_working) in amdgpu_device_init()
1552 amdgpu_test_moves(adev); in amdgpu_device_init()
1557 if (adev->accel_working) in amdgpu_device_init()
1558 amdgpu_test_syncing(adev); in amdgpu_device_init()
1563 if (adev->accel_working) in amdgpu_device_init()
1564 amdgpu_benchmark(adev, amdgpu_benchmarking); in amdgpu_device_init()
1572 r = amdgpu_late_init(adev); in amdgpu_device_init()
1579 static void amdgpu_debugfs_remove_files(struct amdgpu_device *adev);
1589 void amdgpu_device_fini(struct amdgpu_device *adev) in amdgpu_device_fini() argument
1594 adev->shutdown = true; in amdgpu_device_fini()
1596 amdgpu_bo_evict_vram(adev); in amdgpu_device_fini()
1597 amdgpu_ctx_fini(&adev->kernel_ctx); in amdgpu_device_fini()
1598 amdgpu_ib_pool_fini(adev); in amdgpu_device_fini()
1599 amdgpu_fence_driver_fini(adev); in amdgpu_device_fini()
1600 amdgpu_fbdev_fini(adev); in amdgpu_device_fini()
1601 r = amdgpu_fini(adev); in amdgpu_device_fini()
1602 kfree(adev->ip_block_status); in amdgpu_device_fini()
1603 adev->ip_block_status = NULL; in amdgpu_device_fini()
1604 adev->accel_working = false; in amdgpu_device_fini()
1606 amdgpu_i2c_fini(adev); in amdgpu_device_fini()
1607 amdgpu_atombios_fini(adev); in amdgpu_device_fini()
1608 kfree(adev->bios); in amdgpu_device_fini()
1609 adev->bios = NULL; in amdgpu_device_fini()
1610 vga_switcheroo_unregister_client(adev->pdev); in amdgpu_device_fini()
1611 vga_client_register(adev->pdev, NULL, NULL, NULL); in amdgpu_device_fini()
1612 if (adev->rio_mem) in amdgpu_device_fini()
1613 pci_iounmap(adev->pdev, adev->rio_mem); in amdgpu_device_fini()
1614 adev->rio_mem = NULL; in amdgpu_device_fini()
1615 iounmap(adev->rmmio); in amdgpu_device_fini()
1616 adev->rmmio = NULL; in amdgpu_device_fini()
1617 amdgpu_doorbell_fini(adev); in amdgpu_device_fini()
1618 amdgpu_debugfs_regs_cleanup(adev); in amdgpu_device_fini()
1619 amdgpu_debugfs_remove_files(adev); in amdgpu_device_fini()
1638 struct amdgpu_device *adev; in amdgpu_suspend_kms() local
1647 adev = dev->dev_private; in amdgpu_suspend_kms()
1681 if (!amdgpu_fbdev_robj_is_fb(adev, robj)) { in amdgpu_suspend_kms()
1690 amdgpu_bo_evict_vram(adev); in amdgpu_suspend_kms()
1692 amdgpu_fence_driver_suspend(adev); in amdgpu_suspend_kms()
1694 r = amdgpu_suspend(adev); in amdgpu_suspend_kms()
1697 amdgpu_bo_evict_vram(adev); in amdgpu_suspend_kms()
1708 amdgpu_fbdev_set_suspend(adev, 1); in amdgpu_suspend_kms()
1726 struct amdgpu_device *adev = dev->dev_private; in amdgpu_resume_kms() local
1747 if (!amdgpu_card_posted(adev)) in amdgpu_resume_kms()
1748 amdgpu_atom_asic_init(adev->mode_info.atom_context); in amdgpu_resume_kms()
1750 r = amdgpu_resume(adev); in amdgpu_resume_kms()
1754 amdgpu_fence_driver_resume(adev); in amdgpu_resume_kms()
1757 r = amdgpu_ib_ring_tests(adev); in amdgpu_resume_kms()
1762 r = amdgpu_late_init(adev); in amdgpu_resume_kms()
1799 amdgpu_fbdev_set_suspend(adev, 0); in amdgpu_resume_kms()
1814 int amdgpu_gpu_reset(struct amdgpu_device *adev) in amdgpu_gpu_reset() argument
1824 atomic_inc(&adev->gpu_reset_counter); in amdgpu_gpu_reset()
1827 resched = ttm_bo_lock_delayed_workqueue(&adev->mman.bdev); in amdgpu_gpu_reset()
1829 r = amdgpu_suspend(adev); in amdgpu_gpu_reset()
1832 struct amdgpu_ring *ring = adev->rings[i]; in amdgpu_gpu_reset()
1839 dev_info(adev->dev, "Saved %d dwords of commands " in amdgpu_gpu_reset()
1845 r = amdgpu_asic_reset(adev); in amdgpu_gpu_reset()
1847 dev_info(adev->dev, "GPU reset succeeded, trying to resume\n"); in amdgpu_gpu_reset()
1848 r = amdgpu_resume(adev); in amdgpu_gpu_reset()
1853 struct amdgpu_ring *ring = adev->rings[i]; in amdgpu_gpu_reset()
1862 r = amdgpu_ib_ring_tests(adev); in amdgpu_gpu_reset()
1864 dev_err(adev->dev, "ib ring test failed (%d).\n", r); in amdgpu_gpu_reset()
1867 r = amdgpu_suspend(adev); in amdgpu_gpu_reset()
1872 amdgpu_fence_driver_force_completion(adev); in amdgpu_gpu_reset()
1874 if (adev->rings[i]) in amdgpu_gpu_reset()
1879 drm_helper_resume_force_mode(adev->ddev); in amdgpu_gpu_reset()
1881 ttm_bo_unlock_delayed_workqueue(&adev->mman.bdev, resched); in amdgpu_gpu_reset()
1884 dev_info(adev->dev, "GPU reset failed\n"); in amdgpu_gpu_reset()
1894 int amdgpu_debugfs_add_files(struct amdgpu_device *adev, in amdgpu_debugfs_add_files() argument
1900 for (i = 0; i < adev->debugfs_count; i++) { in amdgpu_debugfs_add_files()
1901 if (adev->debugfs[i].files == files) { in amdgpu_debugfs_add_files()
1907 i = adev->debugfs_count + 1; in amdgpu_debugfs_add_files()
1914 adev->debugfs[adev->debugfs_count].files = files; in amdgpu_debugfs_add_files()
1915 adev->debugfs[adev->debugfs_count].num_files = nfiles; in amdgpu_debugfs_add_files()
1916 adev->debugfs_count = i; in amdgpu_debugfs_add_files()
1919 adev->ddev->control->debugfs_root, in amdgpu_debugfs_add_files()
1920 adev->ddev->control); in amdgpu_debugfs_add_files()
1922 adev->ddev->primary->debugfs_root, in amdgpu_debugfs_add_files()
1923 adev->ddev->primary); in amdgpu_debugfs_add_files()
1928 static void amdgpu_debugfs_remove_files(struct amdgpu_device *adev) in amdgpu_debugfs_remove_files() argument
1933 for (i = 0; i < adev->debugfs_count; i++) { in amdgpu_debugfs_remove_files()
1934 drm_debugfs_remove_files(adev->debugfs[i].files, in amdgpu_debugfs_remove_files()
1935 adev->debugfs[i].num_files, in amdgpu_debugfs_remove_files()
1936 adev->ddev->control); in amdgpu_debugfs_remove_files()
1937 drm_debugfs_remove_files(adev->debugfs[i].files, in amdgpu_debugfs_remove_files()
1938 adev->debugfs[i].num_files, in amdgpu_debugfs_remove_files()
1939 adev->ddev->primary); in amdgpu_debugfs_remove_files()
1949 struct amdgpu_device *adev = f->f_inode->i_private; in amdgpu_debugfs_regs_read() local
1959 if (*pos > adev->rmmio_size) in amdgpu_debugfs_regs_read()
1979 struct amdgpu_device *adev = f->f_inode->i_private; in amdgpu_debugfs_regs_write() local
1989 if (*pos > adev->rmmio_size) in amdgpu_debugfs_regs_write()
2014 static int amdgpu_debugfs_regs_init(struct amdgpu_device *adev) in amdgpu_debugfs_regs_init() argument
2016 struct drm_minor *minor = adev->ddev->primary; in amdgpu_debugfs_regs_init()
2020 adev, &amdgpu_debugfs_regs_fops); in amdgpu_debugfs_regs_init()
2023 i_size_write(ent->d_inode, adev->rmmio_size); in amdgpu_debugfs_regs_init()
2024 adev->debugfs_regs = ent; in amdgpu_debugfs_regs_init()
2029 static void amdgpu_debugfs_regs_cleanup(struct amdgpu_device *adev) in amdgpu_debugfs_regs_cleanup() argument
2031 debugfs_remove(adev->debugfs_regs); in amdgpu_debugfs_regs_cleanup()
2032 adev->debugfs_regs = NULL; in amdgpu_debugfs_regs_cleanup()
2044 static int amdgpu_debugfs_regs_init(struct amdgpu_device *adev) in amdgpu_debugfs_regs_init() argument
2048 static void amdgpu_debugfs_regs_cleanup(struct amdgpu_device *adev) { } in amdgpu_debugfs_regs_cleanup() argument