38 	struct amdgpu_device *adev;  member
42 	struct amdgpu_device *adev =					\
43 		((struct amdgpu_cgs_device *)cgs_device)->adev
54 		*mc_size = adev->mc.visible_vram_size;  in amdgpu_cgs_gpu_mem_info()
55 		*mem_size = adev->mc.visible_vram_size - adev->vram_pin_size;  in amdgpu_cgs_gpu_mem_info()
59 		*mc_start = adev->mc.visible_vram_size;  in amdgpu_cgs_gpu_mem_info()
60 		*mc_size = adev->mc.real_vram_size - adev->mc.visible_vram_size;  in amdgpu_cgs_gpu_mem_info()
65 		*mc_start = adev->mc.gtt_start;  in amdgpu_cgs_gpu_mem_info()
66 		*mc_size = adev->mc.gtt_size;  in amdgpu_cgs_gpu_mem_info()
67 		*mem_size = adev->mc.gtt_size - adev->gart_pin_size;  in amdgpu_cgs_gpu_mem_info()
88 	ret = amdgpu_bo_create(adev, size, PAGE_SIZE, false,  in amdgpu_cgs_gmap_kmem()
151 		if (max_offset > adev->mc.real_vram_size)  in amdgpu_cgs_alloc_gpu_mem()
162 		if (adev->mc.visible_vram_size < adev->mc.real_vram_size) {  in amdgpu_cgs_alloc_gpu_mem()
164 				max(min_offset, adev->mc.visible_vram_size) >> PAGE_SHIFT;  in amdgpu_cgs_alloc_gpu_mem()
166 				min(max_offset, adev->mc.real_vram_size) >> PAGE_SHIFT;  in amdgpu_cgs_alloc_gpu_mem()
198 	ret = amdgpu_bo_create_restricted(adev, size, PAGE_SIZE,  in amdgpu_cgs_alloc_gpu_mem()
350 	int ret = pci_read_config_byte(adev->pdev, addr, &val);  in amdgpu_cgs_read_pci_config_byte()
360 	int ret = pci_read_config_word(adev->pdev, addr, &val);  in amdgpu_cgs_read_pci_config_word()
371 	int ret = pci_read_config_dword(adev->pdev, addr, &val);  in amdgpu_cgs_read_pci_config_dword()
381 	int ret = pci_write_config_byte(adev->pdev, addr, value);  in amdgpu_cgs_write_pci_config_byte()
389 	int ret = pci_write_config_word(adev->pdev, addr, value);  in amdgpu_cgs_write_pci_config_word()
397 	int ret = pci_write_config_dword(adev->pdev, addr, value);  in amdgpu_cgs_write_pci_config_dword()
409 		    adev->mode_info.atom_context, table, size,  in amdgpu_cgs_atom_get_data_table()
411 		return (uint8_t*)adev->mode_info.atom_context->bios +  in amdgpu_cgs_atom_get_data_table()
423 		    adev->mode_info.atom_context, table,  in amdgpu_cgs_atom_get_cmd_table_revs()
436 		adev->mode_info.atom_context, table, args);  in amdgpu_cgs_atom_exec_cmd_table()
496 static int cgs_set_irq_state(struct amdgpu_device *adev,  in cgs_set_irq_state()  argument
513 static int cgs_process_irq(struct amdgpu_device *adev,  in cgs_process_irq()  argument
559 	ret = amdgpu_irq_add_id(adev, src_id, source);  in amdgpu_cgs_add_irq_source()
571 	return amdgpu_irq_get(adev, adev->irq.sources[src_id], type);  in amdgpu_cgs_irq_get()
577 	return amdgpu_irq_put(adev, adev->irq.sources[src_id], type);  in amdgpu_cgs_irq_put()
587 	for (i = 0; i < adev->num_ip_blocks; i++) {  in amdgpu_cgs_set_clockgating_state()
588 		if (!adev->ip_block_status[i].valid)  in amdgpu_cgs_set_clockgating_state()
591 		if (adev->ip_blocks[i].type == block_type) {  in amdgpu_cgs_set_clockgating_state()
592 			r = adev->ip_blocks[i].funcs->set_clockgating_state(  in amdgpu_cgs_set_clockgating_state()
593 								(void *)adev,  in amdgpu_cgs_set_clockgating_state()
608 	for (i = 0; i < adev->num_ip_blocks; i++) {  in amdgpu_cgs_set_powergating_state()
609 		if (!adev->ip_block_status[i].valid)  in amdgpu_cgs_set_powergating_state()
612 		if (adev->ip_blocks[i].type == block_type) {  in amdgpu_cgs_set_powergating_state()
613 			r = adev->ip_blocks[i].funcs->set_powergating_state(  in amdgpu_cgs_set_powergating_state()
614 								(void *)adev,  in amdgpu_cgs_set_powergating_state()
649 		if (adev->asic_type == CHIP_TONGA)  in fw_type_convert()
651 		else if (adev->asic_type == CHIP_CARRIZO)  in fw_type_convert()
677 		ucode = &adev->firmware.ucode[id];  in amdgpu_cgs_get_firmware_info()
702 		switch (adev->asic_type) {  in amdgpu_cgs_get_firmware_info()
711 		err = request_firmware(&adev->pm.fw, fw_name, adev->dev);  in amdgpu_cgs_get_firmware_info()
717 		err = amdgpu_ucode_validate(adev->pm.fw);  in amdgpu_cgs_get_firmware_info()
720 			release_firmware(adev->pm.fw);  in amdgpu_cgs_get_firmware_info()
721 			adev->pm.fw = NULL;  in amdgpu_cgs_get_firmware_info()
725 		hdr = (const struct smc_firmware_header_v1_0 *)	adev->pm.fw->data;  in amdgpu_cgs_get_firmware_info()
726 		adev->pm.fw_version = le32_to_cpu(hdr->header.ucode_version);  in amdgpu_cgs_get_firmware_info()
729 		src = (const uint8_t *)(adev->pm.fw->data +  in amdgpu_cgs_get_firmware_info()
732 		info->version = adev->pm.fw_version;  in amdgpu_cgs_get_firmware_info()
780 void *amdgpu_cgs_create_device(struct amdgpu_device *adev)  in amdgpu_cgs_create_device()  argument
792 	cgs_device->adev = adev;  in amdgpu_cgs_create_device()