Lines Matching refs:writew_relaxed

63 	writew_relaxed(gpiodir, chip->base + ZX_GPIO_DIR);  in zx_direction_input()
82 	writew_relaxed(gpiodir, chip->base + ZX_GPIO_DIR);  in zx_direction_output()
85 		writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO1);  in zx_direction_output()
87 		writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO0);  in zx_direction_output()
105 		writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO1);  in zx_set_value()
107 		writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO0);  in zx_set_value()
151 	writew_relaxed(gpiois, chip->base + ZX_GPIO_IVE);  in zx_irq_type()
152 	writew_relaxed(gpioi_epos, chip->base + ZX_GPIO_IEP);  in zx_irq_type()
153 	writew_relaxed(gpioi_eneg, chip->base + ZX_GPIO_IEN);  in zx_irq_type()
154 	writew_relaxed(gpioiev, chip->base + ZX_GPIO_IV);  in zx_irq_type()
171 	writew_relaxed(pending, chip->base + ZX_GPIO_IC);  in zx_irq_handler()
190 	writew_relaxed(gpioie, chip->base + ZX_GPIO_IM);  in zx_irq_mask()
192 	writew_relaxed(gpioie, chip->base + ZX_GPIO_IE);  in zx_irq_mask()
205 	writew_relaxed(gpioie, chip->base + ZX_GPIO_IM);  in zx_irq_unmask()
207 	writew_relaxed(gpioie, chip->base + ZX_GPIO_IE);  in zx_irq_unmask()
258 	writew_relaxed(0xffff, chip->base + ZX_GPIO_IM);  in zx_gpio_probe()
259 	writew_relaxed(0, chip->base + ZX_GPIO_IE);  in zx_gpio_probe()