42 	void __iomem		*base;  member
61 	gpiodir = readw_relaxed(chip->base + ZX_GPIO_DIR);  in zx_direction_input()
63 	writew_relaxed(gpiodir, chip->base + ZX_GPIO_DIR);  in zx_direction_input()
80 	gpiodir = readw_relaxed(chip->base + ZX_GPIO_DIR);  in zx_direction_output()
82 	writew_relaxed(gpiodir, chip->base + ZX_GPIO_DIR);  in zx_direction_output()
85 		writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO1);  in zx_direction_output()
87 		writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO0);  in zx_direction_output()
97 	return !!(readw_relaxed(chip->base + ZX_GPIO_DI) & BIT(offset));  in zx_get_value()
105 		writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO1);  in zx_set_value()
107 		writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO0);  in zx_set_value()
124 	gpioiev = readw_relaxed(chip->base + ZX_GPIO_IV);  in zx_irq_type()
125 	gpiois = readw_relaxed(chip->base + ZX_GPIO_IVE);  in zx_irq_type()
126 	gpioi_epos = readw_relaxed(chip->base + ZX_GPIO_IEP);  in zx_irq_type()
127 	gpioi_eneg = readw_relaxed(chip->base + ZX_GPIO_IEN);  in zx_irq_type()
151 	writew_relaxed(gpiois, chip->base + ZX_GPIO_IVE);  in zx_irq_type()
152 	writew_relaxed(gpioi_epos, chip->base + ZX_GPIO_IEP);  in zx_irq_type()
153 	writew_relaxed(gpioi_eneg, chip->base + ZX_GPIO_IEN);  in zx_irq_type()
154 	writew_relaxed(gpioiev, chip->base + ZX_GPIO_IV);  in zx_irq_type()
170 	pending = readw_relaxed(chip->base + ZX_GPIO_MIS);  in zx_irq_handler()
171 	writew_relaxed(pending, chip->base + ZX_GPIO_IC);  in zx_irq_handler()
189 	gpioie = readw_relaxed(chip->base + ZX_GPIO_IM) | mask;  in zx_irq_mask()
190 	writew_relaxed(gpioie, chip->base + ZX_GPIO_IM);  in zx_irq_mask()
191 	gpioie = readw_relaxed(chip->base + ZX_GPIO_IE) & ~mask;  in zx_irq_mask()
192 	writew_relaxed(gpioie, chip->base + ZX_GPIO_IE);  in zx_irq_mask()
204 	gpioie = readw_relaxed(chip->base + ZX_GPIO_IM) & ~mask;  in zx_irq_unmask()
205 	writew_relaxed(gpioie, chip->base + ZX_GPIO_IM);  in zx_irq_unmask()
206 	gpioie = readw_relaxed(chip->base + ZX_GPIO_IE) | mask;  in zx_irq_unmask()
207 	writew_relaxed(gpioie, chip->base + ZX_GPIO_IE);  in zx_irq_unmask()
230 	chip->base = devm_ioremap_resource(dev, res);  in zx_gpio_probe()
231 	if (IS_ERR(chip->base))  in zx_gpio_probe()
232 		return PTR_ERR(chip->base);  in zx_gpio_probe()
245 	chip->gc.base = ZX_GPIO_NR * id;  in zx_gpio_probe()
258 	writew_relaxed(0xffff, chip->base + ZX_GPIO_IM);  in zx_gpio_probe()
259 	writew_relaxed(0, chip->base + ZX_GPIO_IE);  in zx_gpio_probe()