49 	u8 mask = 1 << (offset % 8);  in stmpe_gpio_get()  local
56 	return !!(ret & mask);  in stmpe_gpio_get()
65 	u8 mask = 1 << (offset % 8);  in stmpe_gpio_set()  local
72 		stmpe_set_bits(stmpe, reg, mask, val ? mask : 0);  in stmpe_gpio_set()
74 		stmpe_reg_write(stmpe, reg, mask);  in stmpe_gpio_set()
83 	u8 mask = 1 << (offset % 8);  in stmpe_gpio_direction_output()  local
87 	return stmpe_set_bits(stmpe, reg, mask, mask);  in stmpe_gpio_direction_output()
96 	u8 mask = 1 << (offset % 8);  in stmpe_gpio_direction_input()  local
98 	return stmpe_set_bits(stmpe, reg, mask, 0);  in stmpe_gpio_direction_input()
129 	int mask = 1 << (offset % 8);  in stmpe_gpio_irq_set_type()  local
139 		stmpe_gpio->regs[REG_RE][regoffset] |= mask;  in stmpe_gpio_irq_set_type()
141 		stmpe_gpio->regs[REG_RE][regoffset] &= ~mask;  in stmpe_gpio_irq_set_type()
144 		stmpe_gpio->regs[REG_FE][regoffset] |= mask;  in stmpe_gpio_irq_set_type()
146 		stmpe_gpio->regs[REG_FE][regoffset] &= ~mask;  in stmpe_gpio_irq_set_type()
199 	int mask = 1 << (offset % 8);  in stmpe_gpio_irq_mask()  local
201 	stmpe_gpio->regs[REG_IE][regoffset] &= ~mask;  in stmpe_gpio_irq_mask()
210 	int mask = 1 << (offset % 8);  in stmpe_gpio_irq_unmask()  local
212 	stmpe_gpio->regs[REG_IE][regoffset] |= mask;  in stmpe_gpio_irq_unmask()
225 	u8 mask = 1 << (offset % 8);  in stmpe_dbg_show_one()  local
232 	dir = !!(ret & mask);  in stmpe_dbg_show_one()
251 		edge_det = !!(ret & mask);  in stmpe_dbg_show_one()
255 		rise = !!(ret & mask);  in stmpe_dbg_show_one()
259 		fall = !!(ret & mask);  in stmpe_dbg_show_one()
263 		irqen = !!(ret & mask);  in stmpe_dbg_show_one()