81 	void __iomem	  *membase;  member
102 	return mvchip->membase + GPIO_OUT_OFF;  in mvebu_gpioreg_out()
107 	return mvchip->membase + GPIO_BLINK_EN_OFF;  in mvebu_gpioreg_blink()
113 	return mvchip->membase + GPIO_IO_CONF_OFF;  in mvebu_gpioreg_io_conf()
118 	return mvchip->membase + GPIO_IN_POL_OFF;  in mvebu_gpioreg_in_pol()
124 	return mvchip->membase + GPIO_DATA_IN_OFF;  in mvebu_gpioreg_data_in()
135 		return mvchip->membase + GPIO_EDGE_CAUSE_OFF;  in mvebu_gpioreg_edge_cause()
152 		return mvchip->membase + GPIO_EDGE_MASK_OFF;  in mvebu_gpioreg_edge_mask()
155 		return mvchip->membase + GPIO_EDGE_MASK_MV78200_OFF(cpu);  in mvebu_gpioreg_edge_mask()
171 		return mvchip->membase + GPIO_LEVEL_MASK_OFF;  in mvebu_gpioreg_level_mask()
174 		return mvchip->membase + GPIO_LEVEL_MASK_MV78200_OFF(cpu);  in mvebu_gpioreg_level_mask()
582 			readl(mvchip->membase + GPIO_EDGE_MASK_OFF);  in mvebu_gpio_suspend()
584 			readl(mvchip->membase + GPIO_LEVEL_MASK_OFF);  in mvebu_gpio_suspend()
589 				readl(mvchip->membase +  in mvebu_gpio_suspend()
592 				readl(mvchip->membase +  in mvebu_gpio_suspend()
599 				readl(mvchip->membase +  in mvebu_gpio_suspend()
602 				readl(mvchip->membase +  in mvebu_gpio_suspend()
626 		       mvchip->membase + GPIO_EDGE_MASK_OFF);  in mvebu_gpio_resume()
628 		       mvchip->membase + GPIO_LEVEL_MASK_OFF);  in mvebu_gpio_resume()
633 			       mvchip->membase + GPIO_EDGE_MASK_MV78200_OFF(i));  in mvebu_gpio_resume()
635 			       mvchip->membase +  in mvebu_gpio_resume()
642 			       mvchip->membase +  in mvebu_gpio_resume()
645 			       mvchip->membase +  in mvebu_gpio_resume()
717 	mvchip->membase = devm_ioremap_resource(&pdev->dev, res);  in mvebu_gpio_probe()
718 	if (IS_ERR(mvchip->membase))  in mvebu_gpio_probe()
719 		return PTR_ERR(mvchip->membase);  in mvebu_gpio_probe()
736 		writel_relaxed(0, mvchip->membase + GPIO_EDGE_CAUSE_OFF);  in mvebu_gpio_probe()
737 		writel_relaxed(0, mvchip->membase + GPIO_EDGE_MASK_OFF);  in mvebu_gpio_probe()
738 		writel_relaxed(0, mvchip->membase + GPIO_LEVEL_MASK_OFF);  in mvebu_gpio_probe()
741 		writel_relaxed(0, mvchip->membase + GPIO_EDGE_CAUSE_OFF);  in mvebu_gpio_probe()
743 			writel_relaxed(0, mvchip->membase +  in mvebu_gpio_probe()
745 			writel_relaxed(0, mvchip->membase +  in mvebu_gpio_probe()
750 		writel_relaxed(0, mvchip->membase + GPIO_EDGE_CAUSE_OFF);  in mvebu_gpio_probe()
751 		writel_relaxed(0, mvchip->membase + GPIO_EDGE_MASK_OFF);  in mvebu_gpio_probe()
752 		writel_relaxed(0, mvchip->membase + GPIO_LEVEL_MASK_OFF);  in mvebu_gpio_probe()
792 				    mvchip->membase, handle_level_irq);  in mvebu_gpio_probe()