70 	struct davinci_gpio_regs __iomem *g;  in irq2regs()  local
72 	g = (__force struct davinci_gpio_regs __iomem *)irq_data_get_irq_chip_data(d);  in irq2regs()
74 	return g;  in irq2regs()
86 	struct davinci_gpio_regs __iomem *g = d->regs;  in __davinci_direction()  local
92 	temp = readl_relaxed(&g->dir);  in __davinci_direction()
95 		writel_relaxed(mask, value ? &g->set_data : &g->clr_data);  in __davinci_direction()
99 	writel_relaxed(temp, &g->dir);  in __davinci_direction()
126 	struct davinci_gpio_regs __iomem *g = d->regs;  in davinci_gpio_get()  local
128 	return (1 << offset) & readl_relaxed(&g->in_data);  in davinci_gpio_get()
138 	struct davinci_gpio_regs __iomem *g = d->regs;  in davinci_gpio_set()  local
140 	writel_relaxed((1 << offset), value ? &g->set_data : &g->clr_data);  in davinci_gpio_set()
290 	struct davinci_gpio_regs __iomem *g = irq2regs(d);  in gpio_irq_disable()  local
293 	writel_relaxed(mask, &g->clr_falling);  in gpio_irq_disable()
294 	writel_relaxed(mask, &g->clr_rising);  in gpio_irq_disable()
299 	struct davinci_gpio_regs __iomem *g = irq2regs(d);  in gpio_irq_enable()  local
308 		writel_relaxed(mask, &g->set_falling);  in gpio_irq_enable()
310 		writel_relaxed(mask, &g->set_rising);  in gpio_irq_enable()
332 	struct davinci_gpio_regs __iomem *g;  in gpio_irq_handler()  local
337 	g = (struct davinci_gpio_regs __iomem *)d->regs;  in gpio_irq_handler()
350 		status = readl_relaxed(&g->intstat) & mask;  in gpio_irq_handler()
353 		writel_relaxed(status, &g->intstat);  in gpio_irq_handler()
396 	struct davinci_gpio_regs __iomem *g;  in gpio_irq_type_unbanked()  local
400 	g = (struct davinci_gpio_regs __iomem *)d->regs;  in gpio_irq_type_unbanked()
407 		     ? &g->set_falling : &g->clr_falling);  in gpio_irq_type_unbanked()
409 		     ? &g->set_rising : &g->clr_rising);  in gpio_irq_type_unbanked()
418 	struct davinci_gpio_regs __iomem *g = gpio2regs(hw);  in davinci_gpio_irq_map()  local
423 	irq_set_chip_data(irq, (__force void *)g);  in davinci_gpio_irq_map()
473 	struct davinci_gpio_regs __iomem *g;  in davinci_gpio_irq_setup()  local
556 		g = gpio2regs(0);  in davinci_gpio_irq_setup()
557 		writel_relaxed(~0, &g->set_falling);  in davinci_gpio_irq_setup()
558 		writel_relaxed(~0, &g->set_rising);  in davinci_gpio_irq_setup()
576 		g = gpio2regs(gpio);  in davinci_gpio_irq_setup()
577 		writel_relaxed(~0, &g->clr_falling);  in davinci_gpio_irq_setup()
578 		writel_relaxed(~0, &g->clr_rising);  in davinci_gpio_irq_setup()