68 static inline struct davinci_gpio_regs __iomem *irq2regs(struct irq_data *d)  in irq2regs()  argument
72 	g = (__force struct davinci_gpio_regs __iomem *)irq_data_get_irq_chip_data(d);  in irq2regs()
85 	struct davinci_gpio_controller *d = chip2controller(chip);  in __davinci_direction()  local
86 	struct davinci_gpio_regs __iomem *g = d->regs;  in __davinci_direction()
91 	spin_lock_irqsave(&d->lock, flags);  in __davinci_direction()
100 	spin_unlock_irqrestore(&d->lock, flags);  in __davinci_direction()
125 	struct davinci_gpio_controller *d = chip2controller(chip);  in davinci_gpio_get()  local
126 	struct davinci_gpio_regs __iomem *g = d->regs;  in davinci_gpio_get()
137 	struct davinci_gpio_controller *d = chip2controller(chip);  in davinci_gpio_set()  local
138 	struct davinci_gpio_regs __iomem *g = d->regs;  in davinci_gpio_set()
288 static void gpio_irq_disable(struct irq_data *d)  in gpio_irq_disable()  argument
290 	struct davinci_gpio_regs __iomem *g = irq2regs(d);  in gpio_irq_disable()
291 	u32 mask = (u32) irq_data_get_irq_handler_data(d);  in gpio_irq_disable()
297 static void gpio_irq_enable(struct irq_data *d)  in gpio_irq_enable()  argument
299 	struct davinci_gpio_regs __iomem *g = irq2regs(d);  in gpio_irq_enable()
300 	u32 mask = (u32) irq_data_get_irq_handler_data(d);  in gpio_irq_enable()
301 	unsigned status = irqd_get_trigger_type(d);  in gpio_irq_enable()
313 static int gpio_irq_type(struct irq_data *d, unsigned trigger)  in gpio_irq_type()  argument
334 	struct davinci_gpio_controller *d;  in gpio_irq_handler()  local
336 	d = (struct davinci_gpio_controller *)irq_desc_get_handler_data(desc);  in gpio_irq_handler()
337 	g = (struct davinci_gpio_regs __iomem *)d->regs;  in gpio_irq_handler()
361 				irq_find_mapping(d->irq_domain,  in gpio_irq_handler()
362 						 d->chip.base + bit));  in gpio_irq_handler()
371 	struct davinci_gpio_controller *d = chip2controller(chip);  in gpio_to_irq_banked()  local
373 	if (d->irq_domain)  in gpio_to_irq_banked()
374 		return irq_create_mapping(d->irq_domain, d->chip.base + offset);  in gpio_to_irq_banked()
381 	struct davinci_gpio_controller *d = chip2controller(chip);  in gpio_to_irq_unbanked()  local
387 	if (offset < d->gpio_unbanked)  in gpio_to_irq_unbanked()
388 		return d->gpio_irq + offset;  in gpio_to_irq_unbanked()
395 	struct davinci_gpio_controller *d;  in gpio_irq_type_unbanked()  local
399 	d = (struct davinci_gpio_controller *)irq_data_get_irq_handler_data(data);  in gpio_irq_type_unbanked()
400 	g = (struct davinci_gpio_regs __iomem *)d->regs;  in gpio_irq_type_unbanked()
401 	mask = __gpio_mask(data->irq - d->gpio_irq);  in gpio_irq_type_unbanked()
415 davinci_gpio_irq_map(struct irq_domain *d, unsigned int irq,  in davinci_gpio_irq_map()  argument