94 static inline int to_reg(int gpio, enum ctrl_register reg_type)  in to_reg()  argument
98 	if (gpio == 94)  in to_reg()
102 		if (gpio < 8)  in to_reg()
107 		if (gpio < 8)  in to_reg()
113 	return reg + gpio % 8;  in to_reg()
117 					int gpio)  in crystalcove_update_irq_mask()  argument
119 	u8 mirqs0 = gpio < 8 ? MGPIO0IRQS0 : MGPIO1IRQS0;  in crystalcove_update_irq_mask()
120 	int mask = BIT(gpio % 8);  in crystalcove_update_irq_mask()
128 static void crystalcove_update_irq_ctrl(struct crystalcove_gpio *cg, int gpio)  in crystalcove_update_irq_ctrl()  argument
130 	int reg = to_reg(gpio, CTRL_IN);  in crystalcove_update_irq_ctrl()
135 static int crystalcove_gpio_dir_in(struct gpio_chip *chip, unsigned gpio)  in crystalcove_gpio_dir_in()  argument
139 	if (gpio > CRYSTALCOVE_VGPIO_NUM)  in crystalcove_gpio_dir_in()
142 	return regmap_write(cg->regmap, to_reg(gpio, CTRL_OUT),  in crystalcove_gpio_dir_in()
146 static int crystalcove_gpio_dir_out(struct gpio_chip *chip, unsigned gpio,  in crystalcove_gpio_dir_out()  argument
151 	if (gpio > CRYSTALCOVE_VGPIO_NUM)  in crystalcove_gpio_dir_out()
154 	return regmap_write(cg->regmap, to_reg(gpio, CTRL_OUT),  in crystalcove_gpio_dir_out()
158 static int crystalcove_gpio_get(struct gpio_chip *chip, unsigned gpio)  in crystalcove_gpio_get()  argument
164 	if (gpio > CRYSTALCOVE_VGPIO_NUM)  in crystalcove_gpio_get()
167 	ret = regmap_read(cg->regmap, to_reg(gpio, CTRL_IN), &val);  in crystalcove_gpio_get()
175 				 unsigned gpio, int value)  in crystalcove_gpio_set()  argument
179 	if (gpio > CRYSTALCOVE_VGPIO_NUM)  in crystalcove_gpio_set()
183 		regmap_update_bits(cg->regmap, to_reg(gpio, CTRL_OUT), 1, 1);  in crystalcove_gpio_set()
185 		regmap_update_bits(cg->regmap, to_reg(gpio, CTRL_OUT), 1, 0);  in crystalcove_gpio_set()
224 	int gpio = data->hwirq;  in crystalcove_bus_sync_unlock()  local
227 		crystalcove_update_irq_ctrl(cg, gpio);  in crystalcove_bus_sync_unlock()
229 		crystalcove_update_irq_mask(cg, gpio);  in crystalcove_bus_sync_unlock()
266 	int gpio;  in crystalcove_gpio_irq_handler()  local
278 	for (gpio = 0; gpio < CRYSTALCOVE_GPIO_NUM; gpio++) {  in crystalcove_gpio_irq_handler()
279 		if (pending & BIT(gpio)) {  in crystalcove_gpio_irq_handler()
280 			virq = irq_find_mapping(cg->chip.irqdomain, gpio);  in crystalcove_gpio_irq_handler()
292 	int gpio, offset;  in crystalcove_gpio_dbg_show()  local
295 	for (gpio = 0; gpio < CRYSTALCOVE_GPIO_NUM; gpio++) {  in crystalcove_gpio_dbg_show()
296 		regmap_read(cg->regmap, to_reg(gpio, CTRL_OUT), &ctlo);  in crystalcove_gpio_dbg_show()
297 		regmap_read(cg->regmap, to_reg(gpio, CTRL_IN), &ctli);  in crystalcove_gpio_dbg_show()
298 		regmap_read(cg->regmap, gpio < 8 ? MGPIO0IRQS0 : MGPIO1IRQS0,  in crystalcove_gpio_dbg_show()
300 		regmap_read(cg->regmap, gpio < 8 ? MGPIO0IRQSX : MGPIO1IRQSX,  in crystalcove_gpio_dbg_show()
302 		regmap_read(cg->regmap, gpio < 8 ? GPIO0IRQ : GPIO1IRQ,  in crystalcove_gpio_dbg_show()
305 		offset = gpio % 8;  in crystalcove_gpio_dbg_show()
307 			   gpio, ctlo & CTLO_DIR_OUT ? "out" : "in ",  in crystalcove_gpio_dbg_show()