Lines Matching refs:bgc

38 	struct bgpio_chip bgc;  member
63 struct bgpio_chip *bgc = to_bgpio_chip(gc); in brcmstb_gpio_gc_to_bank() local
64 return container_of(bgc, struct brcmstb_gpio_bank, bgc); in brcmstb_gpio_gc_to_bank()
77 struct bgpio_chip *bgc = &bank->bgc; in brcmstb_gpio_set_imask() local
79 u32 mask = bgc->pin2mask(bgc, offset); in brcmstb_gpio_set_imask()
83 spin_lock_irqsave(&bgc->lock, flags); in brcmstb_gpio_set_imask()
84 imask = bgc->read_reg(priv->reg_base + GIO_MASK(bank->id)); in brcmstb_gpio_set_imask()
89 bgc->write_reg(priv->reg_base + GIO_MASK(bank->id), imask); in brcmstb_gpio_set_imask()
90 spin_unlock_irqrestore(&bgc->lock, flags); in brcmstb_gpio_set_imask()
152 spin_lock_irqsave(&bank->bgc.lock, flags); in brcmstb_gpio_irq_set_type()
154 iedge_config = bank->bgc.read_reg(priv->reg_base + in brcmstb_gpio_irq_set_type()
156 iedge_insensitive = bank->bgc.read_reg(priv->reg_base + in brcmstb_gpio_irq_set_type()
158 ilevel = bank->bgc.read_reg(priv->reg_base + in brcmstb_gpio_irq_set_type()
161 bank->bgc.write_reg(priv->reg_base + GIO_EC(bank->id), in brcmstb_gpio_irq_set_type()
163 bank->bgc.write_reg(priv->reg_base + GIO_EI(bank->id), in brcmstb_gpio_irq_set_type()
165 bank->bgc.write_reg(priv->reg_base + GIO_LEVEL(bank->id), in brcmstb_gpio_irq_set_type()
168 spin_unlock_irqrestore(&bank->bgc.lock, flags); in brcmstb_gpio_irq_set_type()
213 struct irq_domain *irq_domain = bank->bgc.gc.irqdomain; in brcmstb_gpio_irq_bank_handler()
218 spin_lock_irqsave(&bank->bgc.lock, flags); in brcmstb_gpio_irq_bank_handler()
219 while ((status = bank->bgc.read_reg(reg_base + GIO_STAT(bank->id)) & in brcmstb_gpio_irq_bank_handler()
220 bank->bgc.read_reg(reg_base + GIO_MASK(bank->id)))) { in brcmstb_gpio_irq_bank_handler()
224 u32 stat = bank->bgc.read_reg(reg_base + in brcmstb_gpio_irq_bank_handler()
230 bank->bgc.write_reg(reg_base + GIO_STAT(bank->id), in brcmstb_gpio_irq_bank_handler()
235 spin_unlock_irqrestore(&bank->bgc.lock, flags); in brcmstb_gpio_irq_bank_handler()
306 ret = bgpio_remove(&bank->bgc); in brcmstb_gpio_remove()
401 gpiochip_irqchip_add(&bank->bgc.gc, &bank->irq_chip, 0, in brcmstb_gpio_irq_setup()
403 gpiochip_set_chained_irqchip(&bank->bgc.gc, &bank->irq_chip, in brcmstb_gpio_irq_setup()
454 struct bgpio_chip *bgc; in brcmstb_gpio_probe() local
476 bgc = &bank->bgc; in brcmstb_gpio_probe()
477 err = bgpio_init(bgc, dev, 4, in brcmstb_gpio_probe()
486 gc = &bgc->gc; in brcmstb_gpio_probe()
500 bank->bgc.write_reg(reg_base + GIO_MASK(bank->id), 0); in brcmstb_gpio_probe()