528 	u32			pmd;  member
546 		ctx->pmd * MAX_CPU_PER_PMD + cpu_idx, val,  in xgene_edac_pmd_l1_check()
586 		ctx->pmd * MAX_CPU_PER_PMD + cpu_idx, val,  in xgene_edac_pmd_l1_check()
630 		ctx->pmd * MAX_CPU_PER_PMD + cpu_idx, val,  in xgene_edac_pmd_l1_check()
690 		ctx->pmd, val, val_hi, val_lo);  in xgene_edac_pmd_l2_check()
742 			ctx->pmd, val, val_hi, val_lo);  in xgene_edac_pmd_l2_check()
754 	if (!((PMD0_MERR_MASK << ctx->pmd) & pcp_hp_stat))  in xgene_edac_pmd_check()
804 					       PMD0_MERR_MASK << ctx->pmd);  in xgene_edac_pmd_hw_ctl()
807 					       PMD0_MERR_MASK << ctx->pmd);  in xgene_edac_pmd_hw_ctl()
883 	snprintf(name, sizeof(name), "PMD%d", ctx->pmd);  in xgene_edac_pmd_create_debugfs_nodes()
894 static int xgene_edac_pmd_available(u32 efuse, int pmd)  in xgene_edac_pmd_available()  argument
896 	return (efuse & (1 << pmd)) ? 0 : 1;  in xgene_edac_pmd_available()
906 	u32 pmd;  in xgene_edac_pmd_add()  local
914 	if (of_property_read_u32(np, "pmd-controller", &pmd)) {  in xgene_edac_pmd_add()
922 	if (!xgene_edac_pmd_available(val, pmd)) {  in xgene_edac_pmd_add()
927 	snprintf(edac_name, sizeof(edac_name), "l2c%d", pmd);  in xgene_edac_pmd_add()
938 	ctx->pmd = pmd;  in xgene_edac_pmd_add()
982 	dev_info(edac->dev, "X-Gene EDAC PMD%d registered\n", ctx->pmd);  in xgene_edac_pmd_add()
992 static int xgene_edac_pmd_remove(struct xgene_edac_pmd_ctx *pmd)  in xgene_edac_pmd_remove()  argument
994 	struct edac_device_ctl_info *edac_dev = pmd->edac_dev;  in xgene_edac_pmd_remove()
1774 	struct xgene_edac_pmd_ctx *pmd;  in xgene_edac_isr()  local
1790 	list_for_each_entry(pmd, &ctx->pmds, next) {  in xgene_edac_isr()
1791 		if ((PMD0_MERR_MASK << pmd->pmd) & pcp_hp_stat)  in xgene_edac_isr()
1792 			xgene_edac_pmd_check(pmd->edac_dev);  in xgene_edac_isr()
1917 	struct xgene_edac_pmd_ctx *pmd;  in xgene_edac_remove()  local
1925 	list_for_each_entry_safe(pmd, temp_pmd, &edac->pmds, next)  in xgene_edac_remove()
1926 		xgene_edac_pmd_remove(pmd);  in xgene_edac_remove()