Lines Matching refs:mcu_csr
148 void __iomem *mcu_csr; member
163 ctx->mcu_csr + MCUESRRA0 + i * MCU_RANK_STRIDE); in xgene_edac_mc_err_inject_write()
205 reg = readl(ctx->mcu_csr + MCUESRR0 + rank * MCU_RANK_STRIDE); in xgene_edac_mc_check()
220 bank = readl(ctx->mcu_csr + MCUEBLRR0 + in xgene_edac_mc_check()
222 col_row = readl(ctx->mcu_csr + MCUERCRR0 + in xgene_edac_mc_check()
224 count = readl(ctx->mcu_csr + MCUSBECNT0 + in xgene_edac_mc_check()
238 writel(0x0, ctx->mcu_csr + MCUEBLRR0 + rank * MCU_RANK_STRIDE); in xgene_edac_mc_check()
239 writel(0x0, ctx->mcu_csr + MCUERCRR0 + rank * MCU_RANK_STRIDE); in xgene_edac_mc_check()
240 writel(0x0, ctx->mcu_csr + MCUSBECNT0 + in xgene_edac_mc_check()
242 writel(reg, ctx->mcu_csr + MCUESRR0 + rank * MCU_RANK_STRIDE); in xgene_edac_mc_check()
246 reg = readl(ctx->mcu_csr + MCUGESR); in xgene_edac_mc_check()
255 writel(reg, ctx->mcu_csr + MCUGESR); in xgene_edac_mc_check()
293 val = readl(ctx->mcu_csr + MCUGECR); in xgene_edac_mc_irq_ctl()
298 writel(val, ctx->mcu_csr + MCUGECR); in xgene_edac_mc_irq_ctl()
301 val = readl(ctx->mcu_csr + MCUGECR); in xgene_edac_mc_irq_ctl()
306 writel(val, ctx->mcu_csr + MCUGECR); in xgene_edac_mc_irq_ctl()
374 tmp_ctx.mcu_csr = devm_ioremap_resource(edac->dev, &res); in xgene_edac_mc_add()
375 if (IS_ERR(tmp_ctx.mcu_csr)) { in xgene_edac_mc_add()
377 rc = PTR_ERR(tmp_ctx.mcu_csr); in xgene_edac_mc_add()