Lines Matching refs:dev_err

371 		dev_err(edac->dev, "no MCU resource address\n");  in xgene_edac_mc_add()
376 dev_err(edac->dev, "unable to map MCU resource\n"); in xgene_edac_mc_add()
383 dev_err(edac->dev, "no memory-controller property\n"); in xgene_edac_mc_add()
427 dev_err(edac->dev, "edac_mc_add_mc failed\n"); in xgene_edac_mc_add()
544 dev_err(edac_dev->dev, in xgene_edac_pmd_l1_check()
551 dev_err(edac_dev->dev, "One or more correctable error\n"); in xgene_edac_pmd_l1_check()
553 dev_err(edac_dev->dev, "Multiple correctable error\n"); in xgene_edac_pmd_l1_check()
556 dev_err(edac_dev->dev, "L1 TLB multiple hit\n"); in xgene_edac_pmd_l1_check()
559 dev_err(edac_dev->dev, "Way select multiple hit\n"); in xgene_edac_pmd_l1_check()
562 dev_err(edac_dev->dev, "Physical tag parity error\n"); in xgene_edac_pmd_l1_check()
566 dev_err(edac_dev->dev, "L1 data parity error\n"); in xgene_edac_pmd_l1_check()
569 dev_err(edac_dev->dev, "L1 pre-decode parity error\n"); in xgene_edac_pmd_l1_check()
584 dev_err(edac_dev->dev, in xgene_edac_pmd_l1_check()
591 dev_err(edac_dev->dev, "One or more correctable error\n"); in xgene_edac_pmd_l1_check()
593 dev_err(edac_dev->dev, "Multiple correctable error\n"); in xgene_edac_pmd_l1_check()
596 dev_err(edac_dev->dev, "Load tag error\n"); in xgene_edac_pmd_l1_check()
599 dev_err(edac_dev->dev, "Load data error\n"); in xgene_edac_pmd_l1_check()
602 dev_err(edac_dev->dev, "WSL multihit error\n"); in xgene_edac_pmd_l1_check()
605 dev_err(edac_dev->dev, "Store tag error\n"); in xgene_edac_pmd_l1_check()
608 dev_err(edac_dev->dev, in xgene_edac_pmd_l1_check()
612 dev_err(edac_dev->dev, in xgene_edac_pmd_l1_check()
628 dev_err(edac_dev->dev, in xgene_edac_pmd_l1_check()
636 dev_err(edac_dev->dev, "One or more correctable error\n"); in xgene_edac_pmd_l1_check()
638 dev_err(edac_dev->dev, "Multiple correctable error\n"); in xgene_edac_pmd_l1_check()
641 dev_err(edac_dev->dev, "Stage 1 UTB hit error\n"); in xgene_edac_pmd_l1_check()
644 dev_err(edac_dev->dev, "Stage 1 UTB miss error\n"); in xgene_edac_pmd_l1_check()
647 dev_err(edac_dev->dev, "Stage 1 UTB allocate error\n"); in xgene_edac_pmd_l1_check()
650 dev_err(edac_dev->dev, "TMO operation single bank error\n"); in xgene_edac_pmd_l1_check()
653 dev_err(edac_dev->dev, "Stage 2 UTB error\n"); in xgene_edac_pmd_l1_check()
656 dev_err(edac_dev->dev, "Stage 2 UTB miss error\n"); in xgene_edac_pmd_l1_check()
659 dev_err(edac_dev->dev, "Stage 2 UTB allocate error\n"); in xgene_edac_pmd_l1_check()
662 dev_err(edac_dev->dev, "TMO operation multiple bank error\n"); in xgene_edac_pmd_l1_check()
688 dev_err(edac_dev->dev, in xgene_edac_pmd_l2_check()
691 dev_err(edac_dev->dev, in xgene_edac_pmd_l2_check()
700 dev_err(edac_dev->dev, "One or more correctable error\n"); in xgene_edac_pmd_l2_check()
702 dev_err(edac_dev->dev, "Multiple correctable error\n"); in xgene_edac_pmd_l2_check()
704 dev_err(edac_dev->dev, "One or more uncorrectable error\n"); in xgene_edac_pmd_l2_check()
706 dev_err(edac_dev->dev, "Multiple uncorrectable error\n"); in xgene_edac_pmd_l2_check()
710 dev_err(edac_dev->dev, "Outbound SDB parity error\n"); in xgene_edac_pmd_l2_check()
713 dev_err(edac_dev->dev, "Inbound SDB parity error\n"); in xgene_edac_pmd_l2_check()
716 dev_err(edac_dev->dev, "Tag ECC error\n"); in xgene_edac_pmd_l2_check()
719 dev_err(edac_dev->dev, "Data ECC error\n"); in xgene_edac_pmd_l2_check()
740 dev_err(edac_dev->dev, in xgene_edac_pmd_l2_check()
915 dev_err(edac->dev, "no pmd-controller property\n"); in xgene_edac_pmd_add()
950 dev_err(edac->dev, "no PMD resource address\n"); in xgene_edac_pmd_add()
955 dev_err(edac->dev, in xgene_edac_pmd_add()
968 dev_err(edac->dev, "edac_device_add_device failed\n"); in xgene_edac_pmd_add()
1079 dev_err(edac_dev->dev, "L3C uncorrectable error\n"); in xgene_edac_l3_check()
1087 dev_err(edac_dev->dev, "L3C multiple hit error\n"); in xgene_edac_l3_check()
1089 dev_err(edac_dev->dev, in xgene_edac_l3_check()
1092 dev_err(edac_dev->dev, "L3C multiple uncorrectable error\n"); in xgene_edac_l3_check()
1094 dev_err(edac_dev->dev, in xgene_edac_l3_check()
1098 dev_err(edac_dev->dev, in xgene_edac_l3_check()
1106 dev_err(edac_dev->dev, "L3C error address 0x%08X.%08X bank %d\n", in xgene_edac_l3_check()
1109 dev_err(edac_dev->dev, in xgene_edac_l3_check()
1211 dev_err(edac->dev, "no L3 resource address\n"); in xgene_edac_l3_add()
1216 dev_err(edac->dev, in xgene_edac_l3_add()
1251 dev_err(edac->dev, "failed edac_device_add_device()\n"); in xgene_edac_l3_add()
1403 dev_err(edac_dev->dev, "XGIC transaction error\n"); in xgene_edac_iob_gic_report()
1405 dev_err(edac_dev->dev, "XGIC read size error\n"); in xgene_edac_iob_gic_report()
1407 dev_err(edac_dev->dev, "Multiple XGIC read size error\n"); in xgene_edac_iob_gic_report()
1409 dev_err(edac_dev->dev, "XGIC write size error\n"); in xgene_edac_iob_gic_report()
1411 dev_err(edac_dev->dev, "Multiple XGIC write size error\n"); in xgene_edac_iob_gic_report()
1413 dev_err(edac_dev->dev, "XGIC %s access @ 0x%08X (0x%08X)\n", in xgene_edac_iob_gic_report()
1426 dev_err(edac_dev->dev, in xgene_edac_iob_gic_report()
1435 dev_err(edac_dev->dev, in xgene_edac_iob_gic_report()
1447 dev_err(edac_dev->dev, in xgene_edac_iob_gic_report()
1456 dev_err(edac_dev->dev, in xgene_edac_iob_gic_report()
1478 dev_err(edac_dev->dev, "IOB bridge agent (BA) transaction error\n"); in xgene_edac_rb_report()
1480 dev_err(edac_dev->dev, "IOB BA write response error\n"); in xgene_edac_rb_report()
1482 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1485 dev_err(edac_dev->dev, "IOB BA XGIC poisoned write error\n"); in xgene_edac_rb_report()
1487 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1490 dev_err(edac_dev->dev, "IOB BA RBM poisoned write error\n"); in xgene_edac_rb_report()
1492 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1495 dev_err(edac_dev->dev, "IOB BA write error\n"); in xgene_edac_rb_report()
1497 dev_err(edac_dev->dev, "Multiple IOB BA write error\n"); in xgene_edac_rb_report()
1499 dev_err(edac_dev->dev, "IOB BA transaction error\n"); in xgene_edac_rb_report()
1501 dev_err(edac_dev->dev, "Multiple IOB BA transaction error\n"); in xgene_edac_rb_report()
1503 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1506 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1509 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1512 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1515 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1518 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1523 dev_err(edac_dev->dev, "IOB BA %s access at 0x%02X.%08X (0x%08X)\n", in xgene_edac_rb_report()
1527 dev_err(edac_dev->dev, "IOB BA requestor ID 0x%08X\n", in xgene_edac_rb_report()
1543 dev_err(edac_dev->dev, "IOB procesing agent (PA) transaction error\n"); in xgene_edac_pa_report()
1545 dev_err(edac_dev->dev, "IOB PA read data RAM error\n"); in xgene_edac_pa_report()
1547 dev_err(edac_dev->dev, in xgene_edac_pa_report()
1550 dev_err(edac_dev->dev, "IOB PA write data RAM error\n"); in xgene_edac_pa_report()
1552 dev_err(edac_dev->dev, in xgene_edac_pa_report()
1555 dev_err(edac_dev->dev, "IOB PA transaction error\n"); in xgene_edac_pa_report()
1557 dev_err(edac_dev->dev, "Mutilple IOB PA transaction error\n"); in xgene_edac_pa_report()
1559 dev_err(edac_dev->dev, "IOB PA transaction ID RAM error\n"); in xgene_edac_pa_report()
1561 dev_err(edac_dev->dev, in xgene_edac_pa_report()
1572 dev_err(edac_dev->dev, in xgene_edac_pa_report()
1586 dev_err(edac_dev->dev, in xgene_edac_pa_report()
1631 dev_err(edac_dev->dev, "SoC memory parity error 0x%08X\n", in xgene_edac_soc_check()
1638 dev_err(edac_dev->dev, "%s memory parity error\n", in xgene_edac_soc_check()
1698 dev_err(edac->dev, "no SoC resource address\n"); in xgene_edac_soc_add()
1703 dev_err(edac->dev, in xgene_edac_soc_add()
1736 dev_err(edac->dev, "failed edac_device_add_device()\n"); in xgene_edac_soc_add()
1827 dev_err(edac->dev, "unable to get syscon regmap csw\n"); in xgene_edac_probe()
1835 dev_err(edac->dev, "unable to get syscon regmap mcba\n"); in xgene_edac_probe()
1843 dev_err(edac->dev, "unable to get syscon regmap mcbb\n"); in xgene_edac_probe()
1850 dev_err(edac->dev, "unable to get syscon regmap efuse\n"); in xgene_edac_probe()
1858 dev_err(&pdev->dev, "no PCP resource address\n"); in xgene_edac_probe()
1870 dev_err(&pdev->dev, "No IRQ resource\n"); in xgene_edac_probe()
1878 dev_err(&pdev->dev, in xgene_edac_probe()