1036 	void __iomem		*dev_csr;  member
1074 	l3cesr = readl(ctx->dev_csr + L3C_ESR);  in xgene_edac_l3_check()
1083 	l3celr = readl(ctx->dev_csr + L3C_ELR);  in xgene_edac_l3_check()
1084 	l3caelr = readl(ctx->dev_csr + L3C_AELR);  in xgene_edac_l3_check()
1085 	l3cbelr = readl(ctx->dev_csr + L3C_BELR);  in xgene_edac_l3_check()
1113 	writel(0, ctx->dev_csr + L3C_ESR);  in xgene_edac_l3_check()
1132 	val = readl(ctx->dev_csr + L3C_ECR);  in xgene_edac_l3_hw_init()
1141 	writel(val, ctx->dev_csr + L3C_ECR);  in xgene_edac_l3_hw_init()
1167 	writel(0xFFFFFFFF, ctx->dev_csr + L3C_ESR);  in xgene_edac_l3_inject_ctrl_write()
1202 	void __iomem *dev_csr;  in xgene_edac_l3_add()  local
1214 	dev_csr = devm_ioremap_resource(edac->dev, &res);  in xgene_edac_l3_add()
1215 	if (IS_ERR(dev_csr)) {  in xgene_edac_l3_add()
1218 		rc = PTR_ERR(dev_csr);  in xgene_edac_l3_add()
1232 	ctx->dev_csr = dev_csr;  in xgene_edac_l3_add()
1400 	reg = readl(ctx->dev_csr + XGICTRANSERRINTSTS);  in xgene_edac_iob_gic_report()
1412 	info = readl(ctx->dev_csr + XGICTRANSERRREQINFO);  in xgene_edac_iob_gic_report()
1416 	writel(reg, ctx->dev_csr + XGICTRANSERRINTSTS);  in xgene_edac_iob_gic_report()
1420 	reg = readl(ctx->dev_csr + GLBL_ERR_STS);  in xgene_edac_iob_gic_report()
1424 		err_addr_lo = readl(ctx->dev_csr + GLBL_SEC_ERRL);  in xgene_edac_iob_gic_report()
1425 		err_addr_hi = readl(ctx->dev_csr + GLBL_SEC_ERRH);  in xgene_edac_iob_gic_report()
1429 		writel(err_addr_lo, ctx->dev_csr + GLBL_SEC_ERRL);  in xgene_edac_iob_gic_report()
1430 		writel(err_addr_hi, ctx->dev_csr + GLBL_SEC_ERRH);  in xgene_edac_iob_gic_report()
1433 		err_addr_lo = readl(ctx->dev_csr + GLBL_MSEC_ERRL);  in xgene_edac_iob_gic_report()
1434 		err_addr_hi = readl(ctx->dev_csr + GLBL_MSEC_ERRH);  in xgene_edac_iob_gic_report()
1438 		writel(err_addr_lo, ctx->dev_csr + GLBL_MSEC_ERRL);  in xgene_edac_iob_gic_report()
1439 		writel(err_addr_hi, ctx->dev_csr + GLBL_MSEC_ERRH);  in xgene_edac_iob_gic_report()
1445 		err_addr_lo = readl(ctx->dev_csr + GLBL_DED_ERRL);  in xgene_edac_iob_gic_report()
1446 		err_addr_hi = readl(ctx->dev_csr + GLBL_DED_ERRH);  in xgene_edac_iob_gic_report()
1450 		writel(err_addr_lo, ctx->dev_csr + GLBL_DED_ERRL);  in xgene_edac_iob_gic_report()
1451 		writel(err_addr_hi, ctx->dev_csr + GLBL_DED_ERRH);  in xgene_edac_iob_gic_report()
1454 		err_addr_lo = readl(ctx->dev_csr + GLBL_MDED_ERRL);  in xgene_edac_iob_gic_report()
1455 		err_addr_hi = readl(ctx->dev_csr + GLBL_MDED_ERRH);  in xgene_edac_iob_gic_report()
1459 		writel(err_addr_lo, ctx->dev_csr + GLBL_MDED_ERRL);  in xgene_edac_iob_gic_report()
1460 		writel(err_addr_hi, ctx->dev_csr + GLBL_MDED_ERRH);  in xgene_edac_iob_gic_report()
1474 	reg = readl(ctx->dev_csr + IOBBATRANSERRINTSTS);  in xgene_edac_rb_report()
1521 	err_addr_lo = readl(ctx->dev_csr + IOBBATRANSERRREQINFOL);  in xgene_edac_rb_report()
1522 	err_addr_hi = readl(ctx->dev_csr + IOBBATRANSERRREQINFOH);  in xgene_edac_rb_report()
1528 			readl(ctx->dev_csr + IOBBATRANSERRCSWREQID));  in xgene_edac_rb_report()
1529 	writel(reg, ctx->dev_csr + IOBBATRANSERRINTSTS);  in xgene_edac_rb_report()
1540 	reg = readl(ctx->dev_csr + IOBPATRANSERRINTSTS);  in xgene_edac_pa_report()
1563 	writel(reg, ctx->dev_csr + IOBPATRANSERRINTSTS);  in xgene_edac_pa_report()
1567 	reg = readl(ctx->dev_csr + IOBAXIS0TRANSERRINTSTS);  in xgene_edac_pa_report()
1570 	err_addr_lo = readl(ctx->dev_csr + IOBAXIS0TRANSERRREQINFOL);  in xgene_edac_pa_report()
1571 	err_addr_hi = readl(ctx->dev_csr + IOBAXIS0TRANSERRREQINFOH);  in xgene_edac_pa_report()
1577 	writel(reg, ctx->dev_csr + IOBAXIS0TRANSERRINTSTS);  in xgene_edac_pa_report()
1581 	reg = readl(ctx->dev_csr + IOBAXIS1TRANSERRINTSTS);  in xgene_edac_pa_report()
1584 	err_addr_lo = readl(ctx->dev_csr + IOBAXIS1TRANSERRREQINFOL);  in xgene_edac_pa_report()
1585 	err_addr_hi = readl(ctx->dev_csr + IOBAXIS1TRANSERRREQINFOH);  in xgene_edac_pa_report()
1591 	writel(reg, ctx->dev_csr + IOBAXIS1TRANSERRINTSTS);  in xgene_edac_pa_report()
1672 		       ctx->dev_csr + IOBAXIS0TRANSERRINTMSK);  in xgene_edac_soc_hw_init()
1674 		       ctx->dev_csr + IOBAXIS1TRANSERRINTMSK);  in xgene_edac_soc_hw_init()
1676 		       ctx->dev_csr + XGICTRANSERRINTMSK);  in xgene_edac_soc_hw_init()
1688 	void __iomem *dev_csr;  in xgene_edac_soc_add()  local
1701 	dev_csr = devm_ioremap_resource(edac->dev, &res);  in xgene_edac_soc_add()
1702 	if (IS_ERR(dev_csr)) {  in xgene_edac_soc_add()
1705 		rc = PTR_ERR(dev_csr);  in xgene_edac_soc_add()
1719 	ctx->dev_csr = dev_csr;  in xgene_edac_soc_add()