Lines Matching refs:pvt
273 u64 (*get_tolm)(struct sbridge_pvt *pvt);
274 u64 (*get_tohm)(struct sbridge_pvt *pvt);
281 u8 (*get_node_id)(struct sbridge_pvt *pvt);
282 enum mem_type (*get_memory_type)(struct sbridge_pvt *pvt);
283 enum dev_type (*get_width)(struct sbridge_pvt *pvt, u32 mtr);
681 static u64 sbridge_get_tolm(struct sbridge_pvt *pvt) in sbridge_get_tolm() argument
686 pci_read_config_dword(pvt->pci_sad1, TOLM, ®); in sbridge_get_tolm()
690 static u64 sbridge_get_tohm(struct sbridge_pvt *pvt) in sbridge_get_tohm() argument
694 pci_read_config_dword(pvt->pci_sad1, TOHM, ®); in sbridge_get_tohm()
698 static u64 ibridge_get_tolm(struct sbridge_pvt *pvt) in ibridge_get_tolm() argument
702 pci_read_config_dword(pvt->pci_br1, TOLM, ®); in ibridge_get_tolm()
707 static u64 ibridge_get_tohm(struct sbridge_pvt *pvt) in ibridge_get_tohm() argument
711 pci_read_config_dword(pvt->pci_br1, TOHM, ®); in ibridge_get_tohm()
721 static enum mem_type get_memory_type(struct sbridge_pvt *pvt) in get_memory_type() argument
726 if (pvt->pci_ddrio) { in get_memory_type()
727 pci_read_config_dword(pvt->pci_ddrio, pvt->info.rankcfgr, in get_memory_type()
740 static enum mem_type haswell_get_memory_type(struct sbridge_pvt *pvt) in haswell_get_memory_type() argument
746 if (!pvt->pci_ddrio) in haswell_get_memory_type()
749 pci_read_config_dword(pvt->pci_ddrio, in haswell_get_memory_type()
755 pci_read_config_dword(pvt->pci_ta, MCMTR, ®); in haswell_get_memory_type()
772 static enum dev_type sbridge_get_width(struct sbridge_pvt *pvt, u32 mtr) in sbridge_get_width() argument
800 static enum dev_type ibridge_get_width(struct sbridge_pvt *pvt, u32 mtr) in ibridge_get_width() argument
809 static enum dev_type broadwell_get_width(struct sbridge_pvt *pvt, u32 mtr) in broadwell_get_width() argument
815 static u8 get_node_id(struct sbridge_pvt *pvt) in get_node_id() argument
818 pci_read_config_dword(pvt->pci_br0, SAD_CONTROL, ®); in get_node_id()
822 static u8 haswell_get_node_id(struct sbridge_pvt *pvt) in haswell_get_node_id() argument
826 pci_read_config_dword(pvt->pci_sad1, SAD_CONTROL, ®); in haswell_get_node_id()
830 static u64 haswell_get_tolm(struct sbridge_pvt *pvt) in haswell_get_tolm() argument
834 pci_read_config_dword(pvt->info.pci_vtd, HASWELL_TOLM, ®); in haswell_get_tolm()
838 static u64 haswell_get_tohm(struct sbridge_pvt *pvt) in haswell_get_tohm() argument
843 pci_read_config_dword(pvt->info.pci_vtd, HASWELL_TOHM_0, ®); in haswell_get_tohm()
845 pci_read_config_dword(pvt->info.pci_vtd, HASWELL_TOHM_1, ®); in haswell_get_tohm()
930 struct sbridge_pvt *pvt = mci->pvt_info; in get_dimm_config() local
938 if (pvt->info.type == HASWELL || pvt->info.type == BROADWELL) in get_dimm_config()
939 pci_read_config_dword(pvt->pci_sad1, SAD_TARGET, ®); in get_dimm_config()
941 pci_read_config_dword(pvt->pci_br0, SAD_TARGET, ®); in get_dimm_config()
943 pvt->sbridge_dev->source_id = SOURCE_ID(reg); in get_dimm_config()
945 pvt->sbridge_dev->node_id = pvt->info.get_node_id(pvt); in get_dimm_config()
947 pvt->sbridge_dev->mc, in get_dimm_config()
948 pvt->sbridge_dev->node_id, in get_dimm_config()
949 pvt->sbridge_dev->source_id); in get_dimm_config()
951 pci_read_config_dword(pvt->pci_ras, RASENABLES, ®); in get_dimm_config()
954 pvt->is_mirrored = true; in get_dimm_config()
957 pvt->is_mirrored = false; in get_dimm_config()
960 pci_read_config_dword(pvt->pci_ta, MCMTR, &pvt->info.mcmtr); in get_dimm_config()
961 if (IS_LOCKSTEP_ENABLED(pvt->info.mcmtr)) { in get_dimm_config()
964 pvt->is_lockstep = true; in get_dimm_config()
968 pvt->is_lockstep = false; in get_dimm_config()
970 if (IS_CLOSE_PG(pvt->info.mcmtr)) { in get_dimm_config()
972 pvt->is_close_pg = true; in get_dimm_config()
975 pvt->is_close_pg = false; in get_dimm_config()
978 mtype = pvt->info.get_memory_type(pvt); in get_dimm_config()
994 if (!pvt->pci_tad[i]) in get_dimm_config()
999 pci_read_config_dword(pvt->pci_tad[i], in get_dimm_config()
1003 pvt->channel[i].dimms++; in get_dimm_config()
1005 ranks = numrank(pvt->info.type, mtr); in get_dimm_config()
1013 pvt->sbridge_dev->mc, i/4, i%4, j, in get_dimm_config()
1019 dimm->dtype = pvt->info.get_width(pvt, mtr); in get_dimm_config()
1024 pvt->sbridge_dev->source_id, i/4, i%4, j); in get_dimm_config()
1034 struct sbridge_pvt *pvt = mci->pvt_info; in get_memory_layout() local
1046 pvt->tolm = pvt->info.get_tolm(pvt); in get_memory_layout()
1047 tmp_mb = (1 + pvt->tolm) >> 20; in get_memory_layout()
1051 gb, (mb*1000)/1024, (u64)pvt->tolm); in get_memory_layout()
1054 pvt->tohm = pvt->info.get_tohm(pvt); in get_memory_layout()
1055 tmp_mb = (1 + pvt->tohm) >> 20; in get_memory_layout()
1059 gb, (mb*1000)/1024, (u64)pvt->tohm); in get_memory_layout()
1068 for (n_sads = 0; n_sads < pvt->info.max_sad; n_sads++) { in get_memory_layout()
1070 pci_read_config_dword(pvt->pci_sad0, pvt->info.dram_rule[n_sads], in get_memory_layout()
1091 pci_read_config_dword(pvt->pci_sad0, pvt->info.interleave_list[n_sads], in get_memory_layout()
1093 sad_interl = sad_pkg(pvt->info.interleave_pkg, reg, 0); in get_memory_layout()
1095 u32 pkg = sad_pkg(pvt->info.interleave_pkg, reg, j); in get_memory_layout()
1109 pci_read_config_dword(pvt->pci_ha0, tad_dram_rule[n_tads], in get_memory_layout()
1134 if (!pvt->channel[i].dimms) in get_memory_layout()
1137 pci_read_config_dword(pvt->pci_tad[i], in get_memory_layout()
1154 if (!pvt->channel[i].dimms) in get_memory_layout()
1157 pci_read_config_dword(pvt->pci_tad[i], in get_memory_layout()
1164 tmp_mb = pvt->info.rir_limit(reg) >> 20; in get_memory_layout()
1175 pci_read_config_dword(pvt->pci_tad[i], in get_memory_layout()
1211 struct sbridge_pvt *pvt = mci->pvt_info; in get_memory_error_data() local
1216 unsigned sad_interleave[pvt->info.max_interleave]; in get_memory_error_data()
1232 if ((addr > (u64) pvt->tolm) && (addr < (1LL << 32))) { in get_memory_error_data()
1236 if (addr >= (u64)pvt->tohm) { in get_memory_error_data()
1244 for (n_sads = 0; n_sads < pvt->info.max_sad; n_sads++) { in get_memory_error_data()
1245 pci_read_config_dword(pvt->pci_sad0, pvt->info.dram_rule[n_sads], in get_memory_error_data()
1260 if (n_sads == pvt->info.max_sad) { in get_memory_error_data()
1268 pci_read_config_dword(pvt->pci_sad0, pvt->info.interleave_list[n_sads], in get_memory_error_data()
1271 if (pvt->info.type == SANDY_BRIDGE) { in get_memory_error_data()
1272 sad_interl = sad_pkg(pvt->info.interleave_pkg, reg, 0); in get_memory_error_data()
1274 u32 pkg = sad_pkg(pvt->info.interleave_pkg, reg, sad_way); in get_memory_error_data()
1282 pvt->sbridge_dev->mc, in get_memory_error_data()
1311 } else if (pvt->info.type == HASWELL || pvt->info.type == BROADWELL) { in get_memory_error_data()
1328 pkg = sad_pkg(pvt->info.interleave_pkg, reg, idx); in get_memory_error_data()
1336 pci_read_config_dword(pvt->pci_ha0, in get_memory_error_data()
1346 pkg = sad_pkg(pvt->info.interleave_pkg, reg, idx); in get_memory_error_data()
1368 pvt = mci->pvt_info; in get_memory_error_data()
1374 if (pvt->info.type == SANDY_BRIDGE) in get_memory_error_data()
1375 pci_ha = pvt->pci_ha0; in get_memory_error_data()
1378 pci_ha = pvt->pci_ha1; in get_memory_error_data()
1380 pci_ha = pvt->pci_ha0; in get_memory_error_data()
1429 pci_read_config_dword(pvt->pci_tad[ch_add + base_ch], in get_memory_error_data()
1433 if (pvt->is_mirrored) { in get_memory_error_data()
1447 if (pvt->is_lockstep) in get_memory_error_data()
1482 pci_read_config_dword(pvt->pci_tad[ch_add + base_ch], in get_memory_error_data()
1489 limit = pvt->info.rir_limit(reg); in get_memory_error_data()
1506 if (pvt->is_close_pg) in get_memory_error_data()
1512 pci_read_config_dword(pvt->pci_tad[ch_add + base_ch], in get_memory_error_data()
1683 struct sbridge_pvt *pvt = mci->pvt_info; in sbridge_mci_bind_devs() local
1695 pvt->pci_sad0 = pdev; in sbridge_mci_bind_devs()
1698 pvt->pci_sad1 = pdev; in sbridge_mci_bind_devs()
1701 pvt->pci_br0 = pdev; in sbridge_mci_bind_devs()
1704 pvt->pci_ha0 = pdev; in sbridge_mci_bind_devs()
1707 pvt->pci_ta = pdev; in sbridge_mci_bind_devs()
1710 pvt->pci_ras = pdev; in sbridge_mci_bind_devs()
1718 pvt->pci_tad[id] = pdev; in sbridge_mci_bind_devs()
1723 pvt->pci_ddrio = pdev; in sbridge_mci_bind_devs()
1736 if (!pvt->pci_sad0 || !pvt->pci_sad1 || !pvt->pci_ha0 || in sbridge_mci_bind_devs()
1737 !pvt-> pci_tad || !pvt->pci_ras || !pvt->pci_ta) in sbridge_mci_bind_devs()
1757 struct sbridge_pvt *pvt = mci->pvt_info; in ibridge_mci_bind_devs() local
1769 pvt->pci_ha0 = pdev; in ibridge_mci_bind_devs()
1772 pvt->pci_ta = pdev; in ibridge_mci_bind_devs()
1774 pvt->pci_ras = pdev; in ibridge_mci_bind_devs()
1782 pvt->pci_tad[id] = pdev; in ibridge_mci_bind_devs()
1787 pvt->pci_ddrio = pdev; in ibridge_mci_bind_devs()
1790 pvt->pci_ddrio = pdev; in ibridge_mci_bind_devs()
1793 pvt->pci_sad0 = pdev; in ibridge_mci_bind_devs()
1796 pvt->pci_br0 = pdev; in ibridge_mci_bind_devs()
1799 pvt->pci_br1 = pdev; in ibridge_mci_bind_devs()
1802 pvt->pci_ha1 = pdev; in ibridge_mci_bind_devs()
1810 pvt->pci_tad[id] = pdev; in ibridge_mci_bind_devs()
1825 if (!pvt->pci_sad0 || !pvt->pci_ha0 || !pvt->pci_br0 || in ibridge_mci_bind_devs()
1826 !pvt->pci_br1 || !pvt->pci_tad || !pvt->pci_ras || in ibridge_mci_bind_devs()
1827 !pvt->pci_ta) in ibridge_mci_bind_devs()
1850 struct sbridge_pvt *pvt = mci->pvt_info; in haswell_mci_bind_devs() local
1856 if (pvt->info.pci_vtd == NULL) in haswell_mci_bind_devs()
1858 pvt->info.pci_vtd = pci_get_device(PCI_VENDOR_ID_INTEL, in haswell_mci_bind_devs()
1869 pvt->pci_sad0 = pdev; in haswell_mci_bind_devs()
1872 pvt->pci_sad1 = pdev; in haswell_mci_bind_devs()
1875 pvt->pci_ha0 = pdev; in haswell_mci_bind_devs()
1878 pvt->pci_ta = pdev; in haswell_mci_bind_devs()
1881 pvt->pci_ras = pdev; in haswell_mci_bind_devs()
1890 pvt->pci_tad[id] = pdev; in haswell_mci_bind_devs()
1901 pvt->pci_tad[id] = pdev; in haswell_mci_bind_devs()
1909 if (!pvt->pci_ddrio) in haswell_mci_bind_devs()
1910 pvt->pci_ddrio = pdev; in haswell_mci_bind_devs()
1913 pvt->pci_ha1 = pdev; in haswell_mci_bind_devs()
1916 pvt->pci_ha1_ta = pdev; in haswell_mci_bind_devs()
1929 if (!pvt->pci_sad0 || !pvt->pci_ha0 || !pvt->pci_sad1 || in haswell_mci_bind_devs()
1930 !pvt->pci_ras || !pvt->pci_ta || !pvt->info.pci_vtd) in haswell_mci_bind_devs()
1947 struct sbridge_pvt *pvt = mci->pvt_info; in broadwell_mci_bind_devs() local
1953 if (pvt->info.pci_vtd == NULL) in broadwell_mci_bind_devs()
1955 pvt->info.pci_vtd = pci_get_device(PCI_VENDOR_ID_INTEL, in broadwell_mci_bind_devs()
1966 pvt->pci_sad0 = pdev; in broadwell_mci_bind_devs()
1969 pvt->pci_sad1 = pdev; in broadwell_mci_bind_devs()
1972 pvt->pci_ha0 = pdev; in broadwell_mci_bind_devs()
1975 pvt->pci_ta = pdev; in broadwell_mci_bind_devs()
1978 pvt->pci_ras = pdev; in broadwell_mci_bind_devs()
1986 pvt->pci_tad[id] = pdev; in broadwell_mci_bind_devs()
1996 pvt->pci_tad[id] = pdev; in broadwell_mci_bind_devs()
2001 pvt->pci_ddrio = pdev; in broadwell_mci_bind_devs()
2004 pvt->pci_ha1 = pdev; in broadwell_mci_bind_devs()
2007 pvt->pci_ha1_ta = pdev; in broadwell_mci_bind_devs()
2020 if (!pvt->pci_sad0 || !pvt->pci_ha0 || !pvt->pci_sad1 || in broadwell_mci_bind_devs()
2021 !pvt->pci_ras || !pvt->pci_ta || !pvt->info.pci_vtd) in broadwell_mci_bind_devs()
2049 struct sbridge_pvt *pvt = mci->pvt_info; in sbridge_mce_output_error() local
2066 if (pvt->info.type != SANDY_BRIDGE) in sbridge_mce_output_error()
2134 pvt = mci->pvt_info; in sbridge_mce_output_error()
2152 if (!pvt->is_lockstep && !pvt->is_mirrored && !pvt->is_close_pg) in sbridge_mce_output_error()
2191 struct sbridge_pvt *pvt = mci->pvt_info; in sbridge_check_error() local
2202 count = (pvt->mce_out + MCE_LOG_LEN - pvt->mce_in) in sbridge_check_error()
2207 m = pvt->mce_outentry; in sbridge_check_error()
2208 if (pvt->mce_in + count > MCE_LOG_LEN) { in sbridge_check_error()
2209 unsigned l = MCE_LOG_LEN - pvt->mce_in; in sbridge_check_error()
2211 memcpy(m, &pvt->mce_entry[pvt->mce_in], sizeof(*m) * l); in sbridge_check_error()
2213 pvt->mce_in = 0; in sbridge_check_error()
2217 memcpy(m, &pvt->mce_entry[pvt->mce_in], sizeof(*m) * count); in sbridge_check_error()
2219 pvt->mce_in += count; in sbridge_check_error()
2222 if (pvt->mce_overrun) { in sbridge_check_error()
2224 pvt->mce_overrun); in sbridge_check_error()
2226 pvt->mce_overrun = 0; in sbridge_check_error()
2233 sbridge_mce_output_error(mci, &pvt->mce_outentry[i]); in sbridge_check_error()
2249 struct sbridge_pvt *pvt; in sbridge_mce_check_error() local
2258 pvt = mci->pvt_info; in sbridge_mce_check_error()
2288 if ((pvt->mce_out + 1) % MCE_LOG_LEN == pvt->mce_in) { in sbridge_mce_check_error()
2290 pvt->mce_overrun++; in sbridge_mce_check_error()
2295 memcpy(&pvt->mce_entry[pvt->mce_out], mce, sizeof(*mce)); in sbridge_mce_check_error()
2297 pvt->mce_out = (pvt->mce_out + 1) % MCE_LOG_LEN; in sbridge_mce_check_error()
2318 struct sbridge_pvt *pvt; in sbridge_unregister_mci() local
2327 pvt = mci->pvt_info; in sbridge_unregister_mci()
2345 struct sbridge_pvt *pvt; in sbridge_register_mci() local
2362 sizeof(*pvt)); in sbridge_register_mci()
2370 pvt = mci->pvt_info; in sbridge_register_mci()
2371 memset(pvt, 0, sizeof(*pvt)); in sbridge_register_mci()
2374 pvt->sbridge_dev = sbridge_dev; in sbridge_register_mci()
2388 pvt->info.type = type; in sbridge_register_mci()
2391 pvt->info.rankcfgr = IB_RANK_CFG_A; in sbridge_register_mci()
2392 pvt->info.get_tolm = ibridge_get_tolm; in sbridge_register_mci()
2393 pvt->info.get_tohm = ibridge_get_tohm; in sbridge_register_mci()
2394 pvt->info.dram_rule = ibridge_dram_rule; in sbridge_register_mci()
2395 pvt->info.get_memory_type = get_memory_type; in sbridge_register_mci()
2396 pvt->info.get_node_id = get_node_id; in sbridge_register_mci()
2397 pvt->info.rir_limit = rir_limit; in sbridge_register_mci()
2398 pvt->info.max_sad = ARRAY_SIZE(ibridge_dram_rule); in sbridge_register_mci()
2399 pvt->info.interleave_list = ibridge_interleave_list; in sbridge_register_mci()
2400 pvt->info.max_interleave = ARRAY_SIZE(ibridge_interleave_list); in sbridge_register_mci()
2401 pvt->info.interleave_pkg = ibridge_interleave_pkg; in sbridge_register_mci()
2402 pvt->info.get_width = ibridge_get_width; in sbridge_register_mci()
2411 pvt->info.rankcfgr = SB_RANK_CFG_A; in sbridge_register_mci()
2412 pvt->info.get_tolm = sbridge_get_tolm; in sbridge_register_mci()
2413 pvt->info.get_tohm = sbridge_get_tohm; in sbridge_register_mci()
2414 pvt->info.dram_rule = sbridge_dram_rule; in sbridge_register_mci()
2415 pvt->info.get_memory_type = get_memory_type; in sbridge_register_mci()
2416 pvt->info.get_node_id = get_node_id; in sbridge_register_mci()
2417 pvt->info.rir_limit = rir_limit; in sbridge_register_mci()
2418 pvt->info.max_sad = ARRAY_SIZE(sbridge_dram_rule); in sbridge_register_mci()
2419 pvt->info.interleave_list = sbridge_interleave_list; in sbridge_register_mci()
2420 pvt->info.max_interleave = ARRAY_SIZE(sbridge_interleave_list); in sbridge_register_mci()
2421 pvt->info.interleave_pkg = sbridge_interleave_pkg; in sbridge_register_mci()
2422 pvt->info.get_width = sbridge_get_width; in sbridge_register_mci()
2432 pvt->info.get_tolm = haswell_get_tolm; in sbridge_register_mci()
2433 pvt->info.get_tohm = haswell_get_tohm; in sbridge_register_mci()
2434 pvt->info.dram_rule = ibridge_dram_rule; in sbridge_register_mci()
2435 pvt->info.get_memory_type = haswell_get_memory_type; in sbridge_register_mci()
2436 pvt->info.get_node_id = haswell_get_node_id; in sbridge_register_mci()
2437 pvt->info.rir_limit = haswell_rir_limit; in sbridge_register_mci()
2438 pvt->info.max_sad = ARRAY_SIZE(ibridge_dram_rule); in sbridge_register_mci()
2439 pvt->info.interleave_list = ibridge_interleave_list; in sbridge_register_mci()
2440 pvt->info.max_interleave = ARRAY_SIZE(ibridge_interleave_list); in sbridge_register_mci()
2441 pvt->info.interleave_pkg = ibridge_interleave_pkg; in sbridge_register_mci()
2442 pvt->info.get_width = ibridge_get_width; in sbridge_register_mci()
2452 pvt->info.get_tolm = haswell_get_tolm; in sbridge_register_mci()
2453 pvt->info.get_tohm = haswell_get_tohm; in sbridge_register_mci()
2454 pvt->info.dram_rule = ibridge_dram_rule; in sbridge_register_mci()
2455 pvt->info.get_memory_type = haswell_get_memory_type; in sbridge_register_mci()
2456 pvt->info.get_node_id = haswell_get_node_id; in sbridge_register_mci()
2457 pvt->info.rir_limit = haswell_rir_limit; in sbridge_register_mci()
2458 pvt->info.max_sad = ARRAY_SIZE(ibridge_dram_rule); in sbridge_register_mci()
2459 pvt->info.interleave_list = ibridge_interleave_list; in sbridge_register_mci()
2460 pvt->info.max_interleave = ARRAY_SIZE(ibridge_interleave_list); in sbridge_register_mci()
2461 pvt->info.interleave_pkg = ibridge_interleave_pkg; in sbridge_register_mci()
2462 pvt->info.get_width = broadwell_get_width; in sbridge_register_mci()